B69000 Asiliant Technologies, B69000 Datasheet - Page 208
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B69000
Manufacturer Part Number
B69000
Description
Manufacturer
Asiliant Technologies
Datasheet
1.B69000.pdf
(360 pages)
Specifications of B69000
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XRC8
read/write at I/O address 3D7h with index at I/O address 3D6h set to C8h
Note: All four of the registers used in specifying the loop parameters for dot clock 2 (XRC8 - XRCB) must
be written, and in order from XRC8 to XRCB, before the hardware will update the synthesizer’s settings.
This is a form of double-buffering that is intended to prevent fluctuations in the synthesizer’s output as new
values are being written to these registers.
7-0
XRC9
read/write at I/O address 3D7h with index at I/O address 3D6h set to C9h
Note: All four of the registers used in specifying the loop parameters for dot clock 2 (XRC8 - XRCB) must
be written, and in order from XRC8 to XRCB, before the hardware will update the synthesizer’s settings.
This is a form of double-buffering that is intended to prevent fluctuations in the synthesizer’s output as new
values are being written to these registers.
7-0
&+,36
7
7
Dot Clock 2 VCO M-Divisor
This register provides the M-divisor, one of the loop parameters used in controlling the frequency
of the output of the synthesizer used to generate dot clock 2.
A series of calculations are used to derive this value and the values for the other loop parameters
given a desired output frequency and a series of constraints placed on different components within
the synthesizer used to generate dot clock 2. See appendix B for a detailed description of the
process used to derive the loop parameter values.
Dot Clock 2 VCO N-Divisor Bits 7-0
This register provides the N-divisor, one of the loop parameters used in controlling the frequency of
the output of the synthesizer used to generate dot clock 2.
A series of calculations are used to derive this value and the values for the other loop parameters
given a desired output frequency and a series of constraints placed on different components within
the synthesizer used to generate dot clock 2. See appendix B for a detailed description of the
process used to derive the loop parameter values.
69000 Databook
Dot Clock 2 VCO M-Divisor Register
Dot Clock 2 VCO N-Divisor Register
6
6
5
5
Subject to Change Without Notice
Dot Clock 2 VCO M-Divisor
Dot Clock 2 VCO N-Divisor
Extension Registers
4
4
3
3
2
2
Revision 1.3 8/31/98
1
1
0
0
14-41
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