SC2614MLTR Semtech, SC2614MLTR Datasheet - Page 10

• Manufacturer Part Number: SC2614MLTR
• Manufacturer: Semtech

Specifications of SC2614MLTR

• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Pin Count: 18
• Mounting: Surface Mount
• Package Type: MLP
• Case Length: 6mm
• Screening Level: Commercial
• Lead Free Status / Rohs Status: Not Compliant

recover from the current limit condition, either the power
rails, 5VCC /12VCC have to be recycled, or the SS/EN
pin must be pulled low and released to restart switcher
operation.
Thermal Shutdown
There are three independent Thermal Shutdown
protection circuits in the SC2614: The VDDQ linear
regulator, the VTT source regulator, and the VTT sink
regulator. If any of the three regulators’ temperature
rises above the threshold, that regulator will turn off
independently, until the temperature falls below the
thermal shutdown limit.
Power Good
An open collector output provides indication that the
VDDq switcher is in regulation. This is accomplished by
monitoring the SS/EN pin. When the voltage on this pin
has risen above 1.0V, PGOOD goes high (open). When
BF_CUT goes high (standby), the 5V and 12V rails go low,
and the SS/EN also goes low. Subsequsntly, PWRGD
will also go low, and stays low until the 5V and 12V rails
are recycled and rise above their respective UVLO thresh-
olds.
Compensation Components -
Fig. 1. SC2614 control model.
The control model of SC2614 can be depicted in Fig. 1.
This model can also be used in Spice kind of simulator to
generate loop gain Bode plots. The bandgap reference
is 1.25 V and trimmed to +/-1% accuracy. The desired
output voltage can be achieved by setting the resistive
divider network, R1 and R2.
The error amplifier is transconductance type with fixed
gain of:
POWER MANAGEMENT
Applications Information (Cont.)
© 2004 Semtech Corp.
1.25Vdc
Vbg
EA
G
R
C
m
Gpwm
:=
0.0008A ⋅
Vin
V
L
Rc
Co
Ro
R1
R2
10
The compensation network includes a resistor and a ca-
pacitor in series, which terminates from the output of
the error amplifier to the ground.
This device uses voltage mode control with input voltage
feed forward. The peak-to-peak ramp voltage is propor-
tional to the input voltage, which results in an excellent
performance to reject input voltage variation. The PWM
gain is inversion of the ramp amplitude, and this gain is
given by:
where the ramp amplitude (peak-to-peak) is 0.55 volts
when input voltage is 5 volts.
The total control loop-gain can then be derived as
follows:
where
The task here is to properly choose the compensation
network for a nicely shaped loop-gain Bode plot. The
following design procedures are recommended to accom-
plish the goal:
(1) Calculate the corner frequency of the output filter:
(2) Calculate the ESR zero frequency of the output filter
capacitor:
(3) Check that the ESR zero frequency is not too high.
If this condition is not met, the compensation structure
may not provide loop stability. The solution is to add
some electrolytic capacitors to the output capacitor bank
T s ( ) T o
.
1 s R . C .
s R . C .
T
o
:=
G pwm
G
.
1 s R c C o
F
m
F
o
⋅
esr
G
F
:=
.
pwm
esr
:=
2 π ⋅ L C
<
2 π ⋅ R
.
⋅
⋅
V ramp
V
F
1
⋅
in
5
sw
⋅
1
1
1 s R c
R ⋅
c
⋅
R o
o
⋅
C
L
⎛
⎜
⎝
o
.
V
V
bg
o
.
s
C o
⎞
⎠
2
www.semtech.com
L . C o
SC2614
.
.
1
R c
R o