DSPB56364FU100 Freescale Semiconductor, DSPB56364FU100 Datasheet - Page 35

• Manufacturer Part Number: DSPB56364FU100
• Manufacturer: Freescale Semiconductor

Specifications of DSPB56364FU100

• Device Core Size: 24b
• Format: Fixed Point
• Clock Freq (max): 100MHz
• Mips: 100
• Device Input Clock Speed: 100MHz
• Ram Size: 9KB
• Program Memory Size: 24KB
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3.14V
• Operating Supply Voltage (max): 3.46V
• Operating Temp Range: -40C to 105C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 100
• Package Type: LQFP
• Lead Free Status / Rohs Status: Not Compliant

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Freescale Semiconductor
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No.
The number of wait states for Page mode access is specified in the DCR.
The refresh period is specified in the DCR.
All the timings are calculated for the worst case. Some of the timings are better for specific cases (e.g., t
read-after-read or write-after-write sequences).
Reduced DSP clock speed allows use of Page Mode DRAM with one Wait state (See
BRW[1:0] (DRAM control register bits) defines the number of wait states that should be inserted in each DRAM out-of-page
access.
RD deassertion will always occur after CAS deassertion; therefore, the restricted timing is t
Table 3-9 DRAM Page Mode Timings, One Wait State (Low-Power Applications)
Last RD assertion to RAS deassertion
RD assertion to data valid
RD deassertion to data not valid
WR assertion to data active
WR deassertion to data high
impedance
Characteristics
6
DSP56364 Technical Data, Rev. 4.1
Symbol
t
ROH
t
t
GA
GZ
0.75 × T
1.5 × T
Expression
0.25 × T
T
C
− 7.5
C
C
− 4.0
− 0.3
C
External Memory Expansion Port (Port A)
71.0
37.2
Min
0.0
—
—
20 MHz
Figure 3-14
Max
42.5
12.5
OFF
4
—
—
—
and not t
1, 2, 3
24.7
46.0
Min
0.0
.).
—
—
30 MHz
PC
GZ
(continued)
.
equals 2 × TC for
Max
25.8
8.3
4
—
—
—
Unit
ns
ns
ns
ns
ns
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