DSPA56371AF150B Freescale Semiconductor, DSPA56371AF150B Datasheet - Page 7

• Manufacturer Part Number: DSPA56371AF150B
• Manufacturer: Freescale Semiconductor

Specifications of DSPA56371AF150B

• Device Core Size: 24b
• Format: Fixed Point
• Clock Freq (max): 150MHz
• Mips: 150
• Device Input Clock Speed: 150MHz
• Program Memory Size: 192KB
• Operating Supply Voltage (typ): 1.25/3.3V
• Operating Supply Voltage (min): 1.2/3.14V
• Operating Temp Range: -40C to 115C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 80
• Package Type: LQFP
• Lead Free Status / Rohs Status: Compliant

The PCU implements its functions using the following registers:
The PCU also includes a hardware system stack (SS).
2.4.4
To provide data exchange between blocks, the following buses are implemented:
All internal buses on the DSP56300 family members are 24-bit buses. See
2.4.5
The DMA block has the following features:
Freescale Semiconductor
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PC—program counter register
SR—Status register
LA—loop address register
LC—loop counter register
VBA—vector base address register
SZ—stack size register
SP—stack pointer
OMR—operating mode register
SC—stack counter register
Peripheral input/output expansion bus (PIO_EB) to peripherals
Program memory expansion bus (PM_EB) to program memory
X memory expansion bus (XM_EB) to X memory
Y memory expansion bus (YM_EB) to Y memory
Global data bus (GDB) between registers in the DMA, AGU, OnCE, PLL, BIU and PCU, as well
as the memory-mapped registers in the peripherals
DMA data bus (DDB) for carrying DMA data between memories and/or peripherals
DMA address bus (DAB) for carrying DMA addresses to memories and peripherals
Program Data Bus (PDB) for carrying program data throughout the core
X memory Data Bus (XDB) for carrying X data throughout the core
Y memory Data Bus (YDB) for carrying Y data throughout the core
Program address bus (PAB) for carrying program memory addresses throughout the core
X memory address bus (XAB) for carrying X memory addresses throughout the core
Y memory address bus (YAB) for carrying Y memory addresses throughout the core
Six DMA channels supporting internal and external accesses
One-, two- and three-dimensional transfers (including circular buffering)
End-of-block-transfer interrupts
Internal Buses
Direct Memory Access (DMA)
DSP56371 Data Sheet, Rev. 4.1
Figure
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DSP56371 Overview
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