21554AA Intel, 21554AA Datasheet - Page 3

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21554AA

Manufacturer Part Number
21554AA
Description
Manufacturer
Intel
Datasheet

Specifications of 21554AA

Lead Free Status / Rohs Status
Supplier Unconfirmed
Contents
1
2
3
A
User’s Guide
Introduction
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
1.9
1.10
Operation and Installation
2.1
2.2
2.3
2.4
Optional Configurations
3.1
3.2
3.3
Signal and Default Information
A.1
A.2
Overview ......................................................................................................................... 1-5
Features............................................................................................................................ 1-5
Major Components .......................................................................................................... 1-6
1.3.1
1.3.2
1.3.3
1.3.4
1.3.5
Switch Settings ................................................................................................................ 1-8
Stake-Pin Jumpers ........................................................................................................... 1-9
Clock Configuration ...................................................................................................... 1-10
Clamping Voltage.......................................................................................................... 1-11
Local Bus Slot Numbering and IDSEL Mapping.......................................................... 1-12
Interrupt Routing ........................................................................................................... 1-13
Typical Configurations.................................................................................................. 1-14
Specifications .................................................................................................................. 2-1
Hardware Requirements .................................................................................................. 2-1
Software Requirements .................................................................................................. 2-2
2.3.1
2.3.2
DE1B55401 Installation Procedure................................................................................. 2-4
PICMG Configuration ..................................................................................................... 4-1
Central Function and Arbiter Control.............................................................................. 4-2
Asynchronous Clocking .................................................................................................. 4-2
Test Pod Pin Outs ................................................................................................................3
Factory Default Switch and Jumper Configuration.............................................................5
............................................................................................................................. 1-5
Local or Secondary Bus Connectors................................................................. 1-6
Test Point Pods.................................................................................................. 1-7
Jumpers ............................................................................................................. 1-7
Switch Packs ..................................................................................................... 1-7
Devices.............................................................................................................. 1-7
SROM Programming ........................................................................................ 2-2
Flash ROM Programming ................................................................................. 2-3
..................................................................................................... 4-1
................................................................................................. 2-1
21554 PCI-to-PCI Non-Transparent Bridge Evaluation Board
...........................................................................................3
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