AT29C257-15JC Atmel, AT29C257-15JC Datasheet - Page 3

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AT29C257-15JC

Manufacturer Part Number
AT29C257-15JC
Description
Manufacturer
Atmel
Datasheet

Specifications of AT29C257-15JC

Cell Type
NOR
Density
256Kb
Access Time (max)
150ns
Interface Type
Parallel
Boot Type
Not Required
Address Bus
15b
Operating Supply Voltage (typ)
5V
Operating Temp Range
0C to 70C
Package Type
PLCC
Program/erase Volt (typ)
4.5 to 5.5V
Sync/async
Asynchronous
Operating Temperature Classification
Commercial
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Word Size
8b
Number Of Words
32K
Supply Current
50mA
Mounting
Surface Mount
Pin Count
32
Lead Free Status / Rohs Status
Not Compliant

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Device Operation (Continued)
HARDWARE DATA PROTECTION:
protect against inadvertent programs to the AT29C257 in
the following ways: (a) V
(typical), the program function is inhibited. (b) V
on delay— once V
the device will automatically time out 5 ms (typical) before
programming. (c) Program inhibit— holding any one of OE
low, CE high or WE high inhibits program cycles. (d) Noise
filter— pulses of less than 15 ns (typical) on the WE or CE
inputs will not initiate a program cycle.
PRODUCT IDENTIFICATION: The product identifica-
tion mode identifies the device and manufacturer and may
be accessed by a hardware or software operation. For de-
tails, see Operating Modes or Software Product Identifica-
tion.
Absolute Maximum Ratings*
Temperature Under Bias................. -55 C to +125 C
Storage Temperature...................... -65 C to +150 C
All Input Voltages
(including NC Pins)
with Respect to Ground ................... -0.6V to +6.25V
All Output Voltages
with Respect to Ground .............-0.6V to V
Voltage on OE
with Respect to Ground ................... -0.6V to +13.5V
CC
has reached the V
CC
sense— if V
Hardware features
CC
CC
is below 3.8V
CC
sense level,
CC
+ 0.6V
power
DATA POLLING:
ing to indicate the end of a program cycle. During a pro-
gram cycle an attempted read of the last byte loaded will
result in the complement of the loaded data on I/O7. Once
the program cycle has been completed, true data is valid
on all outputs and the next cycle may begin. DATA polling
may begin at any time during the program cycle.
TOGGLE BIT:
AT29C257 provides another method for determining the
end of a program or erase cycle. During a program or
erase operation, successive attempts to read data from
the device will result in I/O6 toggling between one and
zero. Once the program cycle has completed, I/O6 will
stop toggling and valid data will be read. Examining the
toggle bit may begin at any time during a program cycle.
OPTIONAL CHIP ERASE MODE: The entire device
can be erased by using a 6-byte software code. Please
see Software Chip Erase application note for details.
*NOTICE: Stresses beyond those listed under “Absolute Maxi-
mum Ratings” may cause permanent damage to the device.
This is a stress rating only and functional operation of the
device at these or any other conditions beyond those indi-
cated in the operational sections of this specification is not
implied. Exposure to absolute maximum rating conditions
for extended periods may affect device reliability.
I n a d d i t i o n t o DATA p o l l i n g t h e
The AT29C257 features DATA poll-
AT29C257
4-107

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