ADR292FR Analog Devices Inc, ADR292FR Datasheet - Page 13

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ADR292FR

Manufacturer Part Number
ADR292FR
Description
Manufacturer
Analog Devices Inc
Datasheet

Specifications of ADR292FR

Fixed / Adjust / Prog
Precision
Output Voltage (max)
4.096V
Temperature Coefficient
20ppm/°C
Reference Voltage Accuracy (max)
0.1
Line Regulation
100ppm/V
Load Regulation
100ppm/mA
Input Voltage (max)
18V
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
8
Package Type
SOIC N
Lead Free Status / Rohs Status
Not Compliant

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THEORY OF OPERATION
The ADR291/ADR292 series of references uses a reference
generation technique known as XFET (eXtra implanted junc-
tion FET). This technique yields a reference with low noise, low
supply current, and very low thermal hysteresis.
The core of the XFET reference consists of two junction field
effect transistors, one having an extra channel implant to raise
its pinch-off voltage. By running the two JFETs at the same
drain current, the difference in pinch-off voltage can be amplified
and used to form a highly stable voltage reference. The intrinsic
reference voltage is around 0.5 V with a negative temperature
coefficient of about −120 ppm/K. This slope is essentially
locked to the dielectric constant of silicon and can be closely
compensated by adding a correction term generated in the same
fashion as the proportional-to-temperature (PTAT) term used
to compensate band gap references. Because most of the noise
of a band gap reference comes from the compensation circuitry,
the intrinsic temperature coefficient offers a significant advan-
tage (being about 30 times lower), and therefore, requiring less
correction resulting in much lower noise.
The simplified schematic in Figure 31 shows the basic topology
of the ADR291/ADR292 series. The temperature correction
term is provided by a current source with a value designed to be
proportional to absolute temperature. The general equation is
where:
ΔV
I
The various versions of the ADR291/ADR292 family are created
by on-chip adjustment of R1 and R3 to achieve 2.500 V or
4.096 V at the reference output.
The process used for the XFET reference also features vertical
NPN and PNP transistors, the latter of which are used as output
devices to provide a very low dropout voltage.
PTAT
P
is the difference in pinch-off voltage between the two FETs.
is the positive temperature coefficient correction current.
V
OUT
=
Figure 31. ADR291/ADR292 Simplified Schematic
V
Δ
OUT
1
V
EXTRA CHANNEL IMPLANT
P
I
1
=
R1 + R2 + R3
R
I
1
1
+
R1
R
R
1
2
1
+
× ΔV
 V
R
3
P
P
= I
+
PTAT
V
IN
(
I
PTAT
× R3
R1
R2
R3
) (
R
3
I
PTAT
GND
)
V
OUT
Rev. E | Page 13 of 20
DEVICE POWER DISSIPATION CONSIDERATIONS
The ADR291/ADR292 family of references is guaranteed to
deliver load currents to 5 mA with an input voltage that ranges
from 2.7 V to 15 V (minimum supply voltage depends on the
output voltage chosen). When these devices are used in
applications with large input voltages, care should be exercised
to avoid exceeding the published specifications for maximum
power dissipation or junction temperature that could result in
premature device failure. Use the following formula to calculate
maximum junction temperature or dissipation of a device:
where
T
respectively.
P
θ
BASIC VOLTAGE REFERENCE CONNECTIONS
References, in general, require a bypass capacitor connected
from the V
illustrates the basic configuration for the ADR291/ADR292
family of references. Note that the decoupling capacitors are not
required for circuit stability.
NOISE PERFORMANCE
The noise generated by the ADR291/ADR292 family of refer-
ences is typically less than 12 μV p-p over the 0.1 Hz to 10 Hz
band. The noise measurement is made with a band-pass filter
made of a 2-pole high-pass filter with a corner frequency at 0.1 Hz
and a 2-pole low-pass filter with a corner frequency at 10 Hz.
TURN-ON TIME
Upon application of power (cold start), the time required for
the output voltage to reach its final value within a specified
error band is defined as the turn-on settling time. Two com-
ponents normally associated with this are the time it takes for
the active circuits to settle and for the thermal gradients on the
chip to stabilize. Figure 28 shows the turn-on settling time for
the ADR291.
JA
D
J
and T
is the device power dissipation.
is the device package thermal resistance.
P
D
+
A
=
10µF
are the junction and ambient temperatures,
T
OUT
Figure 32. Basic Voltage Reference Configuration
J
θ
JA
pin to the GND pin. The circuit in Figure 32
T
A
0.1µF
NC
NC
NC = NO CONNECT
1
2
3
4
ADR291/
ADR292
ADR291/ADR292
8
7
6
5
NC
NC
V
NC
OUT
0.1µF

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