T5760NTGS Atmel, T5760NTGS Datasheet - Page 11

• Manufacturer Part Number: T5760NTGS
• Manufacturer: Atmel

Specifications of T5760NTGS

• Operating Temperature (min): -40C
• Operating Temperature (max): 105C
• Operating Temperature Classification: Industrial
• Lead Free Status / Rohs Status: Not Compliant

Figure 8-2.
8.2
8.3
4561C–RKE–05/05
Bit-check Mode
Configuring the Bit Check
IC_ACTIVE
Bit check
Dem_out
Data_out (DATA)
(Number of checked Bits: 3)
Timing Diagram for Complete Successful Bit Check
Start-up mode
In bit-check mode the incoming data stream is examined to distinguish between a valid signal
from a corresponding transmitter and signals due to noise. This is done by subsequent time
frame checks where the distances between 2 signal edges are continuously compared to a pro-
grammable time window. The maximum count of this edge-to-edge tests before the receiver
switches to receiving mode is also programmable.
Assuming a modulation scheme that contains 2 edges per bit, two time frame checks are verify-
ing one bit. This is valid for Manchester, Bi-phase and most other modulation schemes. The
maximum count of bits to be checked can be set to 0, 3, 6 or 9 bits via the variable N
the OPMODE register. This implies 0, 6, 12 and 18 edge-to-edge checks respectively. If N
is set to a higher value, the receiver is less likely to switch to receiving mode due to noise. In the
presence of a valid transmitter signal, the bit check takes less time if N
value. In polling mode, the bit-check time is not dependent on N
shows an example where 3 bits are tested successfully and the data signal is transferred to pin
DATA.
According to
If the edge-to-edge time t
check limit T
T
Figure 8-3.
T
Lim_max
Start-up
, the bit check will be terminated and the receiver switches to sleep mode.
Figure
Lim_max
Valid Time Window for Bit Check
, the check will be continued. If t
8-3, the time window for the bit check is defined by two separate time limits.
1/2 Bit
Dem_out
ee
is in between the lower bit-check limit T
1/2 Bit
Bit-check mode
T
Bit-check
1/2 Bit
T
T
Lim_max
Bit check ok
Lim_min
t
1/2 Bit
ee
1/f
1/2 Bit
Sig
ee
is smaller than T
1/2 Bit
Bit-check
Receiving mode
Lim_min
.
T5760/T5761
Bit-check
Figure 8-2 on page 11
Lim_min
and the upper bit-
is set to a lower
or t
ee
Bit-check
exceeds
Bit-check
11
in