T5760NTGS Atmel, T5760NTGS Datasheet - Page 15

• Manufacturer Part Number: T5760NTGS
• Manufacturer: Atmel

Specifications of T5760NTGS

• Operating Temperature (min): -40C
• Operating Temperature (max): 105C
• Operating Temperature Classification: Industrial
• Lead Free Status / Rohs Status: Not Compliant

Figure 8-9.
8.7
4561C–RKE–05/05
Switching the Receiver Back to Sleep Mode
IC_ACTIVE
Bit check
Dem_out
Data_out (DATA)
Steady L State Limited DATA Output Pattern After Transmission
Start-up mode
After the end of a data transmission, the receiver remains active. Depending of the bit
Noise_Disable in the OPMODE register, the output signal at pin DATA is high or random noise
pulses appear at pin DATA (see section
edge-to-edge time period t
T
The receiver can be set back to polling mode via pin DATA or via pin POLLING/_ON.
When using pin DATA, this pin must be pulled to Low for the period t1 by the connected micro-
controller.
on page
limited but it is recommended not to exceed the specified value to prevent erasing the reset
marker. Note also that an internal reset for the OPMODE and the LIMIT register will be gener-
ated if t1 exceeds the specified values. This item is explained in more detail in the section
“Configuration of the Receiver” on page
achieved by programming bit 1 to be ‘1’ during the register configuration. Only one sync pulse
(t3) is issued.
The duration of the OFF command is determined by the sum of t1, t2 and t10. After the OFF
command the sleep time T
section
DATA_min
“Data Interface” on page
27). The minimum value of t1 depends on BR_Range. The maximum value for t1 is not
.
Figure 8-10 on page 16
Bit-check mode
ee
Sleep
of the majority of these noise pulses is equal or slightly higher than
elapses. Note that the capacitive load at pin DATA is limited (see
28).
illustrates the timing of the OFF command (see
Receiving mode
22. Setting the receiver to sleep mode via DATA is
“Digital Noise Suppression” on page
t
DATA_min
t
DATA_L_max
T5760/T5761
Figure 13-2
20). The
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