74LVT16501ADL NXP Semiconductors, 74LVT16501ADL Datasheet - Page 9

Bus Transceivers 3.3V 18-BIT UNIVRSAL XCVR 3S

74LVT16501ADL

Manufacturer Part Number
74LVT16501ADL
Description
Bus Transceivers 3.3V 18-BIT UNIVRSAL XCVR 3S
Manufacturer
NXP Semiconductors
Datasheet

Specifications of 74LVT16501ADL

Logic Type
BiCMOS
Logic Family
LVT
Number Of Channels Per Chip
18
Input Level
LVTTL
Output Level
LVTTL
Output Type
3-State
High Level Output Current
- 32 mA
Low Level Output Current
64 mA
Propagation Delay Time
3.2 ns
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.7 V
Maximum Operating Temperature
+ 85 C
Package / Case
SSOP-56
Function
Universal Bus Transceiver
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Number Of Circuits
1
Polarity
Non-Inverting
Lead Free Status / Rohs Status
 Details
Other names
74LVT16501ADL,512

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
74LVT16501ADL
Manufacturer:
NXP/恩智浦
Quantity:
20 000
Philips Semiconductors
Table 7.
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
[1]
[2]
[3]
[4]
[5]
[6]
[7]
11. Dynamic characteristics
Table 8.
Voltages are referenced to GND (ground = 0 V); for test circuit see
74LVT16501A_4
Product data sheet
Symbol Parameter
C
C
Symbol Parameter
V
t
t
t
t
t
t
t
PLH
PHL
PZH
PZL
PHZ
PLZ
su(H)
I
CC
i
io
CC
Typical values are at V
For valid test results, data must not be loaded into the flip-flops (or latches) after applying power.
Unused pins at V
This is the bus hold overdrive current required to force the input to the opposite logic state.
This parameter is valid for any V
a transition time of 100 s is permitted. This parameter is valid for T
I
This is the increase in supply current for each input at the specified voltage level other than V
CC
= 2.7 V; T
is measured with outputs pulled to V
additional quiescent supply
current
input capacitance (control pins)
input/output capacitance
(I/O pins)
propagation delay
propagation delay
output enable time to HIGH-state
output enable time to LOW-state
output disable time from HIGH-state
output disable time from LOW-state
setup time HIGH
Static characteristics
Dynamic characteristics
An to Bn or Bn to An
CPAB to Bn or CPBA to An
LEAB to Bn or LEBA to An
An to Bn or Bn to An
CPAB to Bn or CPBA to An
LEAB to Bn or LEBA to An
An to CPAB or Bn to CPBA
An to LEAB with CPAB LOW or
Bn to LEBA with CPBA LOW
An to LEAB with CPAB HIGH or
Bn to LEBA with CPBA HIGH
amb
= 40 C to +85 C
CC
or GND.
CC
= 3.3 V and T
CC
…continued
between 0 V and 1.2 V with a transition time of up to 10 ms. From V
amb
CC
= 25 C.
or GND.
Conditions
per input pin; V
one input at V
at V
V
outputs disabled; V
I
= 0 V or 3.0 V
CC
Rev. 04 — 19 May 2006
or GND
Conditions
see
see
see
see
see
see
see
see
see
see
see
CC
CC
Figure 5
Figure 6
Figure 7
Figure 5
Figure 6
Figure 7
Figure 8
Figure 9
Figure 8
Figure 9
Figure 10
= 3.0 V to 3.6 V;
amb
0.6 V, other inputs
I/O
3.3 V LVT 18-bit universal bus transceiver; 3-state
Figure
= 0 V or 3.0 V
= 25 C only.
11.
[7]
CC
Min
-
-
-
or GND.
Min
-
-
-
-
-
-
-
-
-
-
-
2.4
2.0
1.5
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
74LVT16501A
CC
= 1.2 V to V
Typ
0.1
3
9
Typ
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Max
0.2
-
-
Max
5.4
6.4
6.4
5.4
6.4
6.4
5.5
5.2
6.3
5.6
-
-
-
CC
= 3.3 V
Unit
mA
pF
pF
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
9 of 19
0.3 V

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