CY7C1021BV33L-10VC Cypress Semiconductor Corp, CY7C1021BV33L-10VC Datasheet - Page 5

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CY7C1021BV33L-10VC

Manufacturer Part Number
CY7C1021BV33L-10VC
Description
SRAM Chip Async Single 3.3V 1M-Bit 64K x 16 10ns 44-Pin SOJ
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY7C1021BV33L-10VC

Package
44SOJ
Timing Type
Asynchronous
Density
1 Mb
Typical Operating Supply Voltage
3.3 V
Number Of I/o Lines
16 Bit
Number Of Ports
1
Number Of Words
64K
Data Retention Waveform
Switching Waveforms
Document #: 38-05148 Rev. *A
Read Cycle No. 2 (OE Controlled)
Read Cycle No. 1
Notes:
DATA OUT
12. WE is HIGH for read cycle.
13. Address valid prior to or coincident with CE transition LOW.
11. Device is continuously selected. OE, CE, BHE and/or BHE = V
CURRENT
DATA OUT
ADDRESS
BHE, BLE
SUPPLY
ADDRESS
V
CC
V
OE
CE
CE
CC
[11, 12]
PREVIOUS DATA VALID
HIGH IMPEDANCE
t
t
LZCE
PU
[12, 13]
t
ACE
t
t
LZBE
t
DBE
LZOE
t
DOE
50%
t
t
OHA
CDR
3.0V
t
AA
IL
.
t
RC
DATA RETENTION MODE
t
RC
V
DR
>
2V
DATA VALID
t
HZOE
DATA VALID
3.0V
CY7C1021BV33
t
R
t
t
HZCE
HZBE
t
PD
50%
IMPEDANCE
HIGH
Page 5 of 11
I
I
ICC
ISB
SB
CC

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