CY7C1021BV33L-10VC Cypress Semiconductor Corp, CY7C1021BV33L-10VC Datasheet - Page 6

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CY7C1021BV33L-10VC

Manufacturer Part Number
CY7C1021BV33L-10VC
Description
SRAM Chip Async Single 3.3V 1M-Bit 64K x 16 10ns 44-Pin SOJ
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY7C1021BV33L-10VC

Package
44SOJ
Timing Type
Asynchronous
Density
1 Mb
Typical Operating Supply Voltage
3.3 V
Number Of I/o Lines
16 Bit
Number Of Ports
1
Number Of Words
64K
Switching Waveforms
Document #: 38-05148 Rev. *A
Write Cycle No. 2 (BLE or BHE Controlled)
BHE, BLE
Notes:
Write Cycle No. 1 (CE Controlled)
14. Data I/O is high impedance if OE or BHE and/or BLE= V
15. If CE goes HIGH simultaneously with WE going HIGH, the output remains in a high-impedance state.
ADDRESS
DATA I/O
BHE, BLE
ADDRESS
DATA I/O
WE
CE
CE
WE
(continued)
t
SA
t
SA
[14, 15]
IH
.
t
AW
t
AW
t
WC
t
WC
t
t
BW
t
PWE
t
SCE
SCE
t
PWE
t
BW
t
SD
t
SD
t
HD
t
HD
CY7C1021BV33
t
HA
t
HA
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