APA600-CQ208B Actel, APA600-CQ208B Datasheet - Page 61

• Manufacturer Part Number: APA600-CQ208B
• Description: FPGA ProASICPLUS Family 600K Gates 180MHz 0.22um (CMOS) Technology 2.5V 208-Pin CQFP
• Manufacturer: Actel

Specifications of APA600-CQ208B

• Package: 208CQFP
• Family Name: ProASICPLUS
• Device System Gates: 600000
• Number Of Registers: 21504
• Maximum Internal Frequency: 180 MHz
• Typical Operating Supply Voltage: 2.5 V
• Maximum Number Of User I/os: 158
• Ram Bits: 129024
• Re-programmability Support: Yes

Module Delays
Figure 2-26 • Module Delays
Sample Macrocell Library Listing
Table 2-47 • Worst-Case Military Conditions
Cell Name
NAND2
AND2
NOR3
MUX2L
OA21
XOR2
LDL
DFFL
Notes:
1. Intrinsic delays have a variable component, coupled to the input slope of the signal. These numbers assume an input slope typical of
2. LH and HL refer to the Q transitions from Low to High and High to Low, respectively.
local interconnect.
V
DD
2-Input NAND
2-Input AND
3-Input NOR
2-1 MUX with Active Low Select
2-Input OR into a 2-Input AND
2-Input Exclusive OR
Active Low Latch (LH/HL)
CLK-Q
t
t
Negative Edge-Triggered D-type Flip-Flop (LH/HL)
CLK-Q
t
t
= 2.3 V, T
setup
hold
setup
hold
J
= 70º C, T
C
A
B
Y
J
= 70°C, T
t
50%
DALH
1
50%
50%
Description
J
= 125°C for Military/MIL-STD-883
t
DAHL
50% 50%
A
B
C
t
50%
DBLH
v5.9
50%
t
Y
DBHL
50%50%
t
DCLH
50%
50%
t
DCHL
LH
HL
LH
HL
50%
2
2
2
2
ProASIC
Max
0.5
0.7
0.8
0.5
0.8
0.6
0.9
0.8
0.9
0.8
PLUS
Std.
Flash Family FPGAs
Min
0.7
0.1
0.6
0.0
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
2-51