723631L15PF Integrated Device Technology (Idt), 723631L15PF Datasheet - Page 7

• Manufacturer Part Number: 723631L15PF
• Description: FIFO Mem Sync Dual Depth Bi-Dir 512 x 36 120-Pin TQFP
• Manufacturer: Integrated Device Technology (Idt)

Specifications of 723631L15PF

• Package: 120TQFP
• Configuration: Dual
• Bus Directional: Bi-Directional
• Density: 18 Kb
• Organization: 512x36
• Data Bus Width: 36 Bit
• Timing Type: Synchronous
• Expansion Type: Depth
• Typical Operating Supply Voltage: 5 V
• Operating Temperature: 0 to 70 °C

AC ELECTRICAL CHARACTERISTICS OVER RECOMMENDED RANGES OF
SUPPLY VOLTAGE AND OPERATING FREE-AIR TEMPERATURE
(Commercial: V
NOTES:
1. Industrial temperature range product for 20ns is available as a standard device.
2. Requirement to count the clock edge as one of at least four needed to reset a FIFO.
3. Only applies when serial load method is used to program flag Offset registers.
4. Skew time is not a timing constraint for proper device operation and is only included to illustrate the timing relationship between CLKA cycle and CLKB cycle.
5. Design simulated but not tested (typical values).
IDT723631/723641/723651 CMOS SyncFIFO™
512 x 36, 1,024 x 36 and 2,048 x 36
f
t
t
t
t
t
t
t
t
t
t
t
t
t
tENH2
t
tRSTH
t
t
t
t
t
t
Symbol
DH
S
CLK
CLKH
CLKL
DS
ENS1
ENS2
RMS
RSTS
FSS
SDS
SENS
ENH1
RMH
FSH
SPH
SDH
SENH
SKEW1
SKEW2
(3)
(3)
(3)
(3)
(3)
(4)
(4)
Clock Frequency, CLKA or CLKB
Clock Cycle Time, CLKA or CLKB
Pulse Duration, CLKA or CLKB HIGH
Pulse Duration, CLKA or CLKB LOW
Setup Time, A0-A35 before CLKA↑and B0-B35 before CLKB↑
Setup Time, ENA to CLKA↑; ENB to CLKB↑
Setup Time, CSA, W/RA, and MBA to CLKA↑; CSB, W/RB and MBB to CLKB↑
Setup Time, RTM and RFM to CLKB↑
Setup Time, RST LOW before CLKA↑ or CLKB↑
Setup Time, FS0 and FS1 before RST HIGH
Setup Time, FS0/SD before CLKA↑
Setup Time, FS1/SEN before CLKA↑
Hold Time, A0-A35 after CLKA↑ and B0-B35 after CLKB↑
Hold Time, ENA after CLKA↑; ENB after CLKB↑
Hold Time, CSA, W/RA, and MBA after CLKA↑; CSB, W/RB and MBB after CLKB↑
Hold Time, RTM and RFM after CLKB↑
Hold Time, RST LOW after CLKA↑ or CLKB↑
Hold Time, FS0 and FS1 after RST HIGH
Hold Time, FS1/SEN HIGH after RST HIGH
Hold Time, FS0/SD after CLKA↑
Hold Time, FS1/SEN after CLKA↑
Skew Time, between CLKA↑ and CLKB↑ for OR and IR
Skew Time, between CLKA↑and CLKB↑ for AE and AF
CC
= 5.0V ± 10%, T
A
Parameter
= 0°C to +70°C; Industrial: V
(2)
(2)
CC
= 5.0V ± 10%, T
7
A
= -40°C to +85°C)
Min.
15
12
IDT723631L15
IDT723641L15
IDT723651L15
–
6
6
5
5
7
6
5
9
5
5
0
0
0
0
5
0
0
0
0
9
Commercial
Max.
66.7
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
COMMERCIAL AND INDUSTRIAL
Min.
7.5
6.5
Com’l & Ind’l
20
10
11
16
IDT723631L20
IDT723641L20
IDT723651L20
–
8
8
6
6
6
6
6
0
0
0
0
6
0
0
0
0
TEMPERATURE RANGES
Max.
50
(1)
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
MHz
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns