LE57D121BTC Zarlink, LE57D121BTC Datasheet - Page 4

• Manufacturer Part Number: LE57D121BTC
• Description: SLIC 2-CH 67dB 120mA 5V 44-Pin LQFP EP Tray
• Manufacturer: Zarlink

Specifications of LE57D121BTC

• Package: 44LQFP EP
• Number Of Channels Per Chip: 2
• Polarity Reversal: Yes
• Longitudinal Balanced: 67 dB
• Loop Current: 120 mA
• Minimum Operating Supply Voltage: 4.75 V
• Typical Operating Supply Voltage: 5 V
• Typical Supply Current: 9.3 mA

Signal Transmission
The RSN
amplifier between the AD
and is output at VTX
The desired two-wire AC input impedance, Z
to RSN
must be taken into account.
To set the desired receive gain (G
The transmission block also contains a longitudinal feedback circuit to shunt longitudinal signals to a DC bias voltage. The
longitudinal feedback does not affect metallic signals.
Two application circuits, provided at the end of this data sheet, show how the Le5712 device can connect directly to pins of a
QLSLAC codec.
The
Start capability. The components selected for the transmission network allow a wide range of market transmission requirements
to be met when combined with the programmable QLSLAC device. In addition, transmit relative levels of Li = +4 to -4 dBr and
receive relative levels of Lo = 0 to -8dBr can be supported using only the digital gain within the QLSLAC device for all markets.
This configuration will meet ITU Q.552 and GR57 requirements.
The
pulse metering application with the QLSLAC device. The design allows 2 Vrms into 200
Li = 0 to +4dBr, and Lo = 0 to -8 dBr. This configuration will meet ITU Q.552 requirements over these gain ranges for markets
such as India and China.
The relationship between metering source V
following equation. The load at tip-ring is R
between VTX and RSN at metering frequency.
Metering signal at VTX needs to be filtered to prevent from overloading the codec. This has been realized in the applications
circuitry in this document.
Power Feed Controller and Common Bias
The power feed controllers have three sections: (1) the common bias circuit, (2) the battery feed circuit, and (3) the reverse
polarity circuit which operate in all Active states.
The bias circuit provides a signal which sets the current limit and creates a voltage related to V
connected to the CAS pin, to the battery feed circuit.
The nominal current limit is set by the following equation:
A recommended 3 Hz filter pole frequency (f
The battery feed circuit regulates the amount of DC current and voltage supplied to the telephone over a wide range of loop
resistance. It is designed to operate over a nominal 22 to 33 mA range of programmed current limit. It produces a filtered
reference voltage offset from the subscriber line voltage which is applied to the two-wire interface.
In addition, a low pass filter is implemented with a capacitor connected to the CDC
In the low power Standby state, an alternative feed is implemented via two current limited on chip 200-Ω resistors. The nominal
loop current below current limit in the Standby state is given by:
POTS Application Circuit (POTS with no metering),
Pulse Metering Application Circuit (Pots with metering),
i
, Z
i
input current controls the receive current sent to the two-wire interface. The AC line voltage is sensed by a differential
Ti
. When computing Z
i
.
i
and HP
Ti
, the internal current amplifier pole and any external stray capacitance between VTX and RSN
i
42L
leads. The output of this amplifier is equal to the AC metallic components of the line voltages
) into a load Z
Z
M
M
c
2WIN
RXi
. R
) can be implemented from:
, the feeding resistance, R
V
F
TR
=
, is defined by the fuse resistors, R
is the protection and other, if any, front-end resistances. Z
Z
=
L
------------ -
G
Ti
Zarlink Semiconductor Inc.
from VRX
Z
Z
------- -
R
42L
L
=
M
M
500
-------- -
•
•
3
------------------------------------------------ -
1
---------------------------------------------------
Z
I
LIMIT
T
+
⋅
on page 18
+
(
500
-------- -
i
, Z
4
Z
3
500
-------- - Z
500 Z
2WIN
=
3
RXi
500
•
------------- -
R
on page 20
(
I
Z
----------------------- -
470
STANDBY
•
is connected from VRX
REF
M
L
–
+
Z
T
+
2R
M
T
2R
shows an application providing Loop Start and Ground
2R
, and the output voltage at tip-ring, V
F
C
)
F
F
CAS
V
)
=
M
shows a configuration for use in a 12 or 16 kHz
=
------------------------------- -
V
600 Ω
i
BAT
---------------------------------------- -
RI
pin.
F
, and an impedance connected from VTX
AS
–
+
Ω
•
4 V
, and supports gain ranges of at least
R
1
2 π
L
i
•
to RSN
•
f
c
BAT
i
, where
, filtered by a capacitor
T
TR
is the impedance
, is given in the
i