LE57D121BTC Zarlink, LE57D121BTC Datasheet - Page 8

• Manufacturer Part Number: LE57D121BTC
• Description: SLIC 2-CH 67dB 120mA 5V 44-Pin LQFP EP Tray
• Manufacturer: Zarlink

Specifications of LE57D121BTC

• Package: 44LQFP EP
• Number Of Channels Per Chip: 2
• Polarity Reversal: Yes
• Longitudinal Balanced: 67 dB
• Loop Current: 120 mA
• Minimum Operating Supply Voltage: 4.75 V
• Typical Operating Supply Voltage: 5 V
• Typical Supply Current: 9.3 mA

ABSOLUTE MAXIMUM RATINGS
Stresses greater than those listed under Absolute Maximum Ratings can cause permanent device failure. Functionality at or
above these limits is not implied. Exposure to absolute maximum ratings for extended periods can affect device reliability
Notes:
1.
2.
Package Assembly
Green package devices are assembled with enhanced, environmental compatible lead-free, halogen-free, and antimony-free
materials. The leads possess a matte-tin plating which is compatible with conventional board assembly processes or newer lead-
free board assembly processes. The peak soldering temperature should not exceed 245°C during printed circuit board assembly.
Refer to IPC/JEDEC J-Std-020B Table 5-2 for the recommended solder reflow temperature profile.
OPERATING RANGES
The operating ranges specified below define those limits between which the device operates and is guaranteed under the noted
test conditions. (Refer to
Environmental Ranges
Zarlink guarantees the performance of this device over commercial (0 to 70º C) and industrial (−40 to 85º C) temperature ranges
by conducting electrical characterization, production testing, and periodic sampling over each range. These characterization and
test procedures comply with section 4.6.2 of Bellcore GR-357-CORE Component Reliability Assurance Requirements for
Telecommunications Equipment.
Electrical ranges
Thermal limiting circuitry on chip will shut down the circuit at a junction temperature of about 165º C. Continuous operation above 145º C
junction temperature may degrade device reliability. Refer to the
Note for details.
The thermal performance of a thermally enhanced package is assured through optimized printed circuit board layout. Refer to the
Management for the Le5711 and Le5712 Dual SLIC Devices
Ambient Temperature
Ambient Relative Humidity
V
VBAT
DB1, DB2, and DAC
AGND
BGND
Load resistance on VTX
CC
Storage temperature
V
V
BGND
AD
Current from AD
DB
C1
Maximum power dissipation in 44-pin eTQFP
Thermal Data in 44-pin eTQFP package
ESD Immunity (Human Body Model)
Summary of Test Conditions,
CC
BAT
1
1
1
, C2
Input Voltage
, AD
Continuous
10 ms (F = 0.1 Hz)
1 µs (F = 0.1 Hz)
250 ns (F = 0.1 Hz)
, DB
Voltage on ring-trip inputs
Current into ring-trip inputs
1
with respect to AGND / DGND
T
Junction to Ambient,
, BGND
with respect to AGND / DGND
A
1
, BGND
= 70º C, continuous
1
2
2
, C3
, BD
, and DAC inputs:
1
2
1
, C1
, BD
with respect to AGND/DGND
2
1
with respect to AGND / DGND
, AD
2
, C2
2
with respect to BGND:
2
1
, BD
, VTX
2
, C3
θ
JA
1
, BD
2
2
Zarlink Semiconductor Inc.
to ground
Application Note for details.
2
on page
Thermal Management for the Le5711 and Le7512 Dual SLIC Devices
8
9.)
–55 to +150º C
–0.4 to +7.0 V
+0.4 to –63 V
+3 to –3 V
V
–70 to +5 V
–80 to +8 V
–90 to +12 V
±150 mA
V
±10 mA
–0.4 to V
(see note 1)
(see note 2)
JESD22 Class 1C compliant
BAT
BAT
−40° to 85°C
15% to 85%
4.75 to 5.25 V
–39 to –60 V
V
0 V
–100 to + 100 mV
8 kΩ minimum
to + 1 V
to 0 V
BAT
CC
to –2 V
+ 0.4 V
Application
Thermal