R5F61668RD50FPV Renesas Electronics America, R5F61668RD50FPV Datasheet - Page 808
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R5F61668RD50FPV
Manufacturer Part Number
R5F61668RD50FPV
Description
MCU 3V 1024K I-TEMP 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Datasheet
1.R5F61668RN50FPV.pdf
(1506 pages)
Specifications of R5F61668RD50FPV
Core Processor
H8SX
Core Size
16/32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
92
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
56K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R5F61668RD50FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 808 of 1506
- Download datasheet (9Mb)
Section 14 16-Bit Timer Pulse Unit (TPU)
14.10.13 Multiplexing of I/O Pins
In this LSI, the TCLKA input pin is multiplexed with the TIOCC0 I/O pin, the TCLKB input pin
with the TIOCD0 I/O pin, the TCLKC input pin with the TIOCB1 I/O pin, and the TCLKD input
pin with the TIOCB2 I/O pin. When an external clock is input, compare match output should not
be performed from a multiplexed pin.
14.10.14 PPG1 Setting when TPU1 Pin is Used
When the TPU1 pin is used, the NDER bit of the PPG1 pin multiplexed with the TPU1 pin should
be cleared to halt the output. For details, see section 13, I/O Ports.
14.10.15 Interrupts in the Module Stop State
If module stop state is entered when an interrupt has been requested, it will not be possible to clear
the CPU interrupt source, or the DTC or DMAC activation sources. Interrupts should therefore be
disabled before entering module stop state.
Rev. 2.00 Sep. 24, 2008 Page 774 of 1468
REJ09B0412-0200
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