ADV3000ASTZ Analog Devices Inc, ADV3000ASTZ Datasheet - Page 15

IC HDMI/DVI SWITCH 3.1 80LQFP

ADV3000ASTZ

Manufacturer Part Number
ADV3000ASTZ
Description
IC HDMI/DVI SWITCH 3.1 80LQFP
Manufacturer
Analog Devices Inc
Datasheet

Specifications of ADV3000ASTZ

Function
Switch
Circuit
1 x 3:1
Voltage Supply Source
Single Supply
Voltage - Supply, Single/dual (±)
3 V ~ 3.6 V
Current - Supply
110mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
80-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
GENERAL CASE
READ PROCEDURE
To read data from the ADV3000 register set, an I
(such as a microcontroller) needs to send the appropriate
control signals to the ADV3000 slave device. The signals are
controlled by the I
diagram of the procedure, see Figure 30. The steps for a read
procedure are as follows:
1.
2.
3.
4.
5.
6.
7.
8.
9.
10. Wait for the ADV3000 to acknowledge the request.
11. The ADV3000 serially transfers the data (eight bits) held in
12. Acknowledge the data from the ADV3000.
Send a start condition (while holding the I2C_SCL line
high, pull the I2C_SDA line low).
Send the ADV3000 part address (seven bits). The upper six
bits of the ADV3000 part address are the static value
[100100] and the LSB is set by Input Pin I2C_ADDR0. This
transfer should be MSB first.
Send the write indicator bit (0).
Wait for the ADV3000 to acknowledge the request.
Send the register address (eight bits) from which data is to
be read. This transfer should be MSB first.
Wait for the ADV3000 to acknowledge the request.
Send a repeated start condition (Sr) by holding the
I2C_SCL line high and pulling the I2C_SDA line low.
The upper six bits of the ADV3000 part address are the
static value [100100] and the LSB is set by the Input Pin
I2C_ADDR0. This transfer should be MSB first.
Send the read indicator bit (1).
the register indicated by the address set in Step 5. This data
is sent MSB first.
EXAMPLE
Resend the ADV3000 part address (seven bits) from Step 2.
I2C_SDA
I2C_SDA
I2C_SCL
START
1
2
C master, unless otherwise specified. For a
2
FIXED PART
ADDR
I2C_ADDR0
R/W
3
ACK
4
5
2
C master
REGISTER ADDR
Figure 30. I
Rev. 0 | Page 15 of 28
2
C Read Diagram
ACK
6
7
SR
13. Perform one of the following:
SWITCH
There is a delay between when a user
tion registers of the ADV3000 and when that state change take
physical effect. This update delay occurs regardless of whether
the user programs the ADV3000 via the serial or the parallel
control interface. When using the serial control interface, the
update delay begins at the falling edge of I2C_SCL for the last
data bit transferred, as shown in Figure 29. When using the
parallel control interface, the update delay begins at the
transition edge of the relevant parallel interface pin. This
delay is register specific and the times are specified in Table 1.
During a delay window, new values can be written to the
configuration registers, but the ADV3000 does not physic
update until the end of the delay window of that register. Writing
new values during the delay window does not reset the window;
new values supersede the previously written values. At the end
of the delay window, the ADV3000 physically assumes the state
indicated by the last set of values written to the configuration
registers. If the configuration registers are written after the dela
window ends, the ADV3000 immediately updates and a new
delay window begins.
FIXED PART
13a. S
13b.
13c.
13d.
8
ADDR
line high, pull the SDA line high) and release control
of the bus to end the transaction (shown in
Send a repea
I2C_SCL line high, pull the I2C_SDA line low) and
continue with Step 2 of the write procedure (previous
Write Procedure section) to perform a write.
Send a repeated start condition (while holding the
I2C_SCL line high, pull the I2C_SDA line low) and
continue with Step 2 of this procedure to perform a
read from another address.
Send a repeated start conditi
I2C_SCL line high, pull the I2C_SDA line low) and
continue with Step 8 of this procedure to perform a
read from the same address.
ING/UPDATE DELAY
end a st
ADDR
op condition (while holding the I2C_SCL
ted start condition (while holding the
R/W
9 10 11
ACK
writes to the configura-
on (while holding the
DATA
ADV3000
ACK
12
Figure 30
STOP
update
ally
13
).
s
y

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