ADV3000ASTZ-RL Analog Devices Inc, ADV3000ASTZ-RL Datasheet - Page 23

IC HDMI/DVI SWITCH 3.1 80LQFP

ADV3000ASTZ-RL

Manufacturer Part Number
ADV3000ASTZ-RL
Description
IC HDMI/DVI SWITCH 3.1 80LQFP
Manufacturer
Analog Devices Inc
Datasheet

Specifications of ADV3000ASTZ-RL

Function
Switch
Circuit
1 x 3:1
Voltage Supply Source
Single Supply
Voltage - Supply, Single/dual (±)
3 V ~ 3.6 V
Current - Supply
110mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
80-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
board, particularly for the input traces. In some applications, such
as using multiple ADV3000s to construct large input arrays, the use
of interlayer vias becomes unavoidable. In these situations, the
input termination feature of the ADV3000 improves system signal
integrity by absorbing reflections. Take care to use vias minimally
and to place vias symmetrically for each side of a given differential
pair. Furthermore, to prevent unwanted signal coupling and
interference, route the TMDS signals away from other signals
and noise sources on the PCB.
Both traces of a given differential pair must be equal in length
to minimize intrapair skew. Maintaining the physical symmetry
of a differential pair is integral to ensuring its signal integrity;
excessive intrapair skew can introduce jitter through duty cycle
distortion (DCD). The p and n of a given differential pair should
always be routed together to establish the required 100 Ω differ-
ential impedance. Enough space should be left between the
differential pairs of a given group so that the n of one pair does
not couple to the p of another pair. For example, one technique is
to make the interpair distance 4 to 10 times wider than the
intrapair spacing.
Any group of four TMDS channels (Input A, Input B, Input C,
or the output) should have closely matched trace lengths to
minimize interpair skew. Severe interpair skew can cause the
data on the four different channels of a group to arrive out of
alignment with one another. A good practice is to match the
trace lengths for a given group of four channels to within
0.05 inches on FR4 material.
Minimizing intrapair and interpair skew becomes increasingly
important as data rates increase. Any introduced skew consti-
tutes a correspondingly larger fraction of a bit period at higher
data rates.
Though the ADV3000 features input equalization and output
pre-emphasis, the length of the TMDS traces should be mini-
mized to reduce overall signal degradation. Commonly used
PCB material such as FR4 is lossy at high frequencies; therefore,
long traces on the circuit board increase signal attenuation
resulting in decreased signal swing and increased jitter through
intersymbol interference (ISI).
Controlling the Characteristic Impedance of a TMDS
Differential Pair
The characteristic impedance of a differential pair depends
on a number of variables, including the trace width, the
distance between the two traces, the height of the dielectric
material between the trace and the reference plane below it,
and the dielectric constant of the PCB binder material. To
a lesser extent, the characteristic impedance also depends
upon the trace thickness and the presence of solder mask.
There are many combinations that can produce the correct
characteristic impedance. Generally, working with the PCB
fabricator is required to obtain a set of parameters to produce
the desired results.
Rev. 0 | Page 23 of 28
One consideration is how to guarantee a differential pair with
a differential impedance of 100 Ω over the entire length of the
trace. One technique to accomplish this is to change the width
of the traces in a differential pair based on how closely one trace
is coupled to the other. When the two traces of a differential
pair are close and strongly coupled, they should have a width
that produces a 100 Ω differential impedance. When the traces
split apart, to go into a connector, for example, and are no
longer so strongly coupled, the width of the traces should be
increased to yield a differential impedance of 100 Ω in the new
configuration.
Ground Current Return
In some applications, it can be necessary to invert the output
pin order of the ADV3000. This requires a designer to route the
TMDS traces on multiple layers of the PCB. When routing
differential pairs on multiple layers, it is also necessary to
reroute the corresponding reference plane to provide one
continuous ground current return path for the differential
signals. Standard plated through-hole vias are acceptable for
both the TMDS traces and the reference plane. An example of
this is illustrated in Figure 32.
TMDS Terminations
The ADV3000 provides internal, 50 Ω single-ended
terminations for all of its high speed inputs and outputs. It is
not necessary to include external termination resistors for the
TMDS differential pairs on the PCB.
The output termination resistors of the ADV3000 back-terminate
the output TMDS transmission lines. These back-terminations
act to absorb reflections from impedance discontinuities on the
output traces, improving the signal integrity of the output traces
and adding flexibility to how the output traces can be routed.
For example, interlayer vias can be used to route the ADV3000
TMDS outputs on multiple layers of the PCB without severely
degrading the quality of the output signal.
SILKSCREEN
LAYER 1: SIGNAL (MICROSTRIP)
PCB DIELECTRIC
LAYER 2: GND (REFERENCE PLANE)
PCB DIELECTRIC
LAYER 3: PWR
(REFERENCE PLANE)
PCB DIELECTRIC
LAYER 4: SIGNAL (MICROSTRIP)
SILKSCREEN
Figure 32. Example Routing of Reference Plane
KEEP REFERENCE PLANE
ADJACENT TO SIGNAL ON ALL
LAYERS TO PROVIDE CONTINUOUS
GROUND CURRENT RETURN PATH.
THROUGH-HOLE VIAS
ADV3000

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