HC55143IM Intersil, HC55143IM Datasheet - Page 23

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HC55143IM

Manufacturer Part Number
HC55143IM
Description
IC SLIC UNIVERSAL LP 32-PLCC
Manufacturer
Intersil
Series
UniSLIC14r
Datasheet

Specifications of HC55143IM

Function
Subscriber Line Interface Concept (SLIC)
Number Of Circuits
1
Voltage - Supply
4.75 V ~ 5.25 V
Current - Supply
2.25mA
Power (watts)
1.4W
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
28-PLCC
Includes
Battery Tracking Anti-Clipping, Loop and Ground Key Detection, Ring Control
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Interface
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HC55143IM
Manufacturer:
Intersil
Quantity:
10 000
capacitor will activate an internal latch prohibiting the ringing
of the line.
Figure 19 shows the sequence of events from ringing the
phone to ring trip. The ring relay turns on when both the
ringing code and ring sync pulse are present (A). SHD is
high at this point. When the subscriber goes off hook the
SHD pin goes low and stays low until the ringing control
code is removed (B). This prevents the SHD output from
pulsing after ring trip occurs. At the next zero current
crossing of the ring signal, ring trip occurs and the ring relay
releases the line to allow loop current to flow in the loop (C).
Operation of Line Voltage Measurement
A few of the SLICs in the UniSLIC14 family feature Line
Voltage Measurement (LVM) capability. This feature
provides a pulse on the GKD_LVM output pin that is
proportional to the loop voltage. Knowing the loop voltage
and thus the loop length, other basic cable characteristics
such as attenuation and capacitance can be inferred.
Decisions can be made about gain switching in the CODEC
to overcome line losses and verification of the 2-wire circuit
integrity.
The LVM function can only be activated in the off hook
condition in either the forward or reverse operating states. The
LVM uses the ring signal supplied to the SLIC as a timebase
generator. The loop resistance is determined by monitoring
the pulse width of the output signal on the GKD_LVM pin. The
output signal on the GKD_LVM pin is a square wave for which
the average duration of the low state is proportional to the
average voltage between the tip and ring terminals. The loop
resistance is determined by the tip to ring voltage and the
constant loop current. Reference Figure 20.
Although the logic state changes to the Test Active State
when performing this test, the SLIC is still powered up in the
RINGING CURRENT
RINGING VOLTAGE
RINGING CODE
RELAY DRIVER
SHD OUTPUT
RING SYNC
APPLIED
IN LINE
PULSE
FIGURE 19. RINGING SEQUENCE
HC55120, HC55121, HC55130, HC55140, HC55142, HC55143, HC55150
OFF
(A)
23
ON
(B)
(C)
OFF
active state (forward or reverse) and the subscriber is
unaware the measurement is being taken.
Polarity Reversal
Most of the SLICs in the UniSLIC14 family feature full
polarity reversal. Full polarity reversal means that the SLIC
can: transmit, determine the status of the line (on hook and
off hook) and provide “silent” polarity reversal. The value of
RSYNC_REV resistor is limited between 34.8k (10ms) and
73.2k (21ms). Reference Equation 39 to program the polarity
reversal time.
Transhybrid Balance
If a low cost CODEC is chosen that does not have a transmit
op-amp, the UniSLIC14 family of SLICs can solve this
problem without the need for an additional op-amp. The
solution is to use the Programmable Transmit Gain pin (PTG)
as an input for the receive signal (V
PTG pin is connected to a divider network (R1 and R2
Figure 21) and the value of R1 and R2 is much less than the
internal 500kΩ resistors, two things happen. First the transmit
gain from V
shorting out the bottom 500kΩ resistor with the much smaller
external resistor. And second, the input signal from V
also decreased by the voltage divider R1 and R2. Transhybrid
balance occurs when these two, equal but opposite in phase,
signals are cancelled at the input to the output buffer. The
calculation of the value of R2, once R1 is selected, is effected
by the line feed resistors. EQ. 40 can be used to calculate the
value of R2. Where : Z
impedance of SLIC including the protection resistor, and
RP = protection resitors (typical 30
R
FIGURE 20. OPERATION OF THE LINE VOLTAGE
2
=
R
------------------------- -
·
1
RING
II500K
1.02
GEN
RX
MEASUREMENT CIRCUIT
to V
----------------------------- -
Z
Z
L
L
TX
+ 2ZR
+ Z
is reduced by half. This is the result of
TIP
RING
DR
DT
L
TR
= Line Impedance, Z
P
UniSLIC14
GKD_LVM
R
------------------------- -
·
1
1.02
II500K
RX
).
). In theory, when the
PULSE WIDTH
PROPORTIONAL TO
LOOP LENGTH
LOOP LENGTH
TR
FREQ
RING
GEN
= input
June 1, 2006
RX
FN4659.13
(EQ. 40)
is

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