CAT5221WI-25-T2 ON Semiconductor, CAT5221WI-25-T2 Datasheet - Page 3

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CAT5221WI-25-T2

Manufacturer Part Number
CAT5221WI-25-T2
Description
Manufacturer
ON Semiconductor
Datasheet

Specifications of CAT5221WI-25-T2

Lead Free Status / Rohs Status
Compliant
Pin Description
SCL: Serial Clock
data transfers into or out of the device.
SDA: Serial Data
transfer data into and out of the device. The SDA pin is an
open drain output and can be wire−Or’d with the other open
drain or open collector outputs.
A0, A1, A2, A3: Device Address Inputs
multiple devices. A total of sixteen devices can be addressed
on a single bus. A match in the slave address must be made
with the address input in order to initiate communication
with the CAT5221.
R
terminal connections on a mechanical potentiometer.
R
a mechanical potentiometer.
Table 1. PIN DESCRIPTION
H
W
The CAT5221 serial clock input pin is used to clock all
The CAT5221 bidirectional serial data pin is used to
These inputs set the device address when addressing
The two sets of R
The two R
, R
Pin (SOIC)
: Wiper
L
10
11
12
13
14
15
16
17
18
19
20
1
2
3
4
5
6
7
8
9
: Resistor End Points
W
pins are equivalent to the wiper terminal of
H
Name
GND
SDA
R
R
SCL
R
R
V
R
R
NC
NC
NC
NC
NC
NC
A0
A2
A3
A1
and R
W0
W1
CC
H0
H1
L0
L1
L
pins are equivalent to the
Wiper Terminal for Potentiometer 0
Low Reference Terminal for Potentiometer 0
High Reference Terminal for Potentiometer 0
Device Address, LSB
Device Address
Wiper Terminal for Potentiometer 1
Low Reference Terminal for Potentiometer 1
High Reference Terminal for Potentiometer 1
Serial Data Input/Output
Ground
No Connect
No Connect
No Connect
Bus Serial Clock
Device Address
Device Address
No Connect
No Connect
No Connect
Supply Voltage
http://onsemi.com
3
Device Operation
serial interface logic, two 6−bit wiper control registers and
eight 6−bit, non−volatile memory data registers. Each
resistor array contains 63 separate resistive elements
connected in series. The physical ends of each array are
equivalent to the fixed terminals of a mechanical
potentiometer (R
may be interchanged. The tap positions between and at the
ends of the series resistors are connected to the output wiper
terminals (R
point for each potentiometer is connected to its wiper
terminal at a time and is determined by the value of the wiper
control register. Data can be read or written to the wiper
control registers or the non−volatile memory data registers
via the I
transferred between the wiper control registers and each
respective potentiometer’s non−volatile data registers. Also,
the device can be instructed to operate in an “increment/
decrement” mode.
The CAT5221 is two resistor arrays integrated with I
Function
2
C bus. Additional instructions allow data to be
W
) by a CMOS transistor switch. Only one tap
H
and R
L
). R
H
and R
L
are symmetrical and
2
C

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