CY7C4271-15JXIT Cypress Semiconductor Corp, CY7C4271-15JXIT Datasheet - Page 6

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CY7C4271-15JXIT

Manufacturer Part Number
CY7C4271-15JXIT
Description
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY7C4271-15JXIT

Lead Free Status / Rohs Status
Compliant
Document #: 38-06015 Rev. *D
Figure 4. Block Diagram of 16K × 18/32K × 18 Deep Sync FIFO Memory Used in a Width Expansion Configuration
WRITE ENABLE 1(WEN1)
WRITE ENABLE 2/LOAD
PROGRAMMABLE(PAF)
DATAIN (D)
WRITECLOCK (WCLK)
FULL FLAG (FF) # 1
FULL FLAG (FF) # 2
(WEN2/LD)
18
9
Read Enable 2 (REN2)
FF
CY7C4261/71
RESET (RS)
EF
9
9
Read Enable 2 (REN2)
FF
CY7C4261/71
RESET (RS)
EF
EMPTY FLAG (EF) #2
EMPTY FLAG (EF) #1
9
READ CLOCK (RCLK)
READ ENABLE 1 (REN1)
OUTPUT ENABLE (OE)
PROGRAMMABLE(PAE)
DATA OUT (Q)
CY7C4261, CY7C4261
18
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