HD3-6402R-9Z Intersil, HD3-6402R-9Z Datasheet

IC UART CMOS 5V 2MHZ 40-DIP

HD3-6402R-9Z

Manufacturer Part Number
HD3-6402R-9Z
Description
IC UART CMOS 5V 2MHZ 40-DIP
Manufacturer
Intersil
Datasheet
1.HD3-6402R-9Z.pdf (7 pages)

Specifications of HD3-6402R-9Z

Features
Low Power CMOS
Number Of Channels
8
Voltage - Supply
4.5 V ~ 5.5 V
With False Start Bit Detection
Yes
With Cmos
Yes
Mounting Type
Through Hole
Package / Case
40-DIP (0.600", 15.24mm)
No. Of Channels
1
Supply Voltage Range
4.5V To 5.5V
Operating Temperature Range
-40°C To +85°C
Digital Ic Case Style
DIP
No. Of Pins
40
Supply Voltage Max
5.5V
Supply Voltage Min
4.5V
Rohs Compliant
Yes
Clock Frequency
2MHz
Operating Temperature Max
85°C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
CMOS Universal Asynchronous
Receiver Transmitter (UART)
The HD-6402 is a CMOS UART for interfacing computers or
microprocessors to an asynchronous serial data channel.
The receiver converts serial start, data, parity and stop bits.
The transmitter converts parallel data into serial form and
automatically adds start, parity and stop bits. The data word
length can be 5, 6, 7 or 8 bits. Parity may be odd or even.
Parity checking and generation can be inhibited. The stop
bits may be one or two or one and one-half when
transmitting 5-bit code.
The HD-6402 can be used in a wide range of applications
including modems, printers, peripherals and remote data
acquisition systems. Utilizing the Intersil advanced scaled
SAJI IV CMOS process permits operation clock frequencies
up to 8.0MHz (500K Baud). Power requirements, by
comparison, are reduced from 300mW to 10mW. Status
logic increases flexibility and simplifies the user interface.
Pinout
RBR8
RBR7
RBR6
RBR5
RBR4
RBR3
RBR2
RBR1
GND
RRD
RRC
DRR
V
SFD
RRI
NC
OE
DR
PE
CC
FE
10
11
12
13
14
15
16
17
18
19
20
HD-6402 (PDIP, CERDIP)
1
2
3
4
5
6
7
8
9
TOP VIEW
®
1
Data Sheet
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
TRC
EPE
CLS1
CLS2
SBS
PI
CRL
TBR8
TBR7
TBR6
TBR5
TBR4
TBR3
TBR2
TBR1
TRO
TRE
TBRL
TBRE
MR
1-888-INTERSIL or 1-888-468-3774
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
Features
• 8.0MHz Operating Frequency (5962-9052502)
• 2.0MHz Operating Frequency (HD3-6402R)
• Low Power CMOS Design
• Programmable Word Length, Stop Bits and Parity
• Automatic Data Formatting and Status Generation
• Compatible with Industry Standard UARTs
• Single +5V Power Supply
• CMOS/TTL Compatible Inputs
• Pb-Free Plus Anneal Available (RoHS Compliant)
Ordering Information
NOTE: Intersil Pb-free plus anneal products employ special Pb-free
material sets; molding compounds/die attach materials and 100%
matte tin plate termination finish, which are RoHS compliant and
compatible with both SnPb and Pb-free soldering operations. Intersil
Pb-free products are MSL classified at Pb-free peak reflow
temperatures that meet or exceed the Pb-free requirements of
IPC/JEDEC J STD-020.
*Pb-free PDIPs can be used for through hole wave solder processing
only. They are not intended for use in Reflow solder processing
applications.
PDIP
PDIP*
(Pb-free)
CERDIP -
SMD#
PACKAGE
October 31, 2005
All other trademarks mentioned are the property of their respective owners.
|
RANGE (°C)
Intersil (and design) is a registered trademark of Intersil Americas Inc.
-55 to +125
-40 to +85
-40 to +85
TEMP
Copyright Intersil Americas Inc. 2001, 2005. All Rights Reserved
HD3-6402R-9
HD3-6402R-9Z
(Note)
2MHz = 125K
BAUD
5962-
9052502MQA
8MHz = 500K
HD-6402
BAUD
FN2956.3
E40.6
E40.6
F40.6
DWG.
PKG.
#

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HD3-6402R-9Z Summary of contents

Page 1

... All other trademarks mentioned are the property of their respective owners. HD-6402 FN2956.3 TEMP 2MHz = 125K 8MHz = 500K RANGE (°C) BAUD BAUD -40 to +85 HD3-6402R-9 -40 to +85 HD3-6402R-9Z (Note) -55 to +125 5962- 9052502MQA | Intersil (and design registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2001, 2005. All Rights Reserved PKG. DWG. # E40.6 E40 ...

Page 2

Functional Diagram (24) TRE (22) TBRE † (23) TBRL TRANSMITTER TIMING AND (40) TRC CONTROL (38) CLS1 (37) CLS2 (34) CRL (21) MR (17) RRC RECEIVER TIMING AND CONTROL (18) DRR (19) DR † (16) SFD † THESE OUTPUTS ARE ...

Page 3

Pin Description PIN TYPE SYMBOL DESCRIPTION † Positive Voltage Supply Connection 3 GND Ground 4 I RRD A high level on RECEIVER REGISTER DISABLE forces the receiver holding out-puts RBR1-RBR8 to high impedance state. ...

Page 4

Transmitter Operation The transmitter section accepts parallel data, formats the data and transmits the data in serial form on the Transmitter Register Output (TRO) terminal (See serial data format). Data is loaded from the inputs TBR1-TBR8 into the Transmitter Buffer ...

Page 5

RRI RBR1-8, OE, PE DRR DR FE START BIT Start Bit Detection The receiver uses a 16X clock timing. The start bit could have occurred as much as one clock cycle before it was detected, as indicated by the shaded ...

Page 6

... C to +150 C PDIP Package Gate Count . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1643 Gates o *Pb-free PDIPs can be used for through hole wave solder processing C only. They are not intended for use in Reflow solder processing applications. Operating Temperature Range HD3-6402R - 5.0V ± +85 C (HD3-6402R-9) A LIMITS MIN MAX 2.0 ...

Page 7

... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...

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