ISD4002-120E Nuvoton Technology Corporation of America, ISD4002-120E Datasheet - Page 10

IC VOICE REC/PLAY 120SEC 28-TSOP

ISD4002-120E

Manufacturer Part Number
ISD4002-120E
Description
IC VOICE REC/PLAY 120SEC 28-TSOP
Manufacturer
Nuvoton Technology Corporation of America
Series
ISD4002r
Datasheet

Specifications of ISD4002-120E

Interface
SPI/Microwire
Filter Pass Band
3.4kHz
Duration
120 Sec
Mounting Type
Surface Mount
Package / Case
28-TSOP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
ISD4002120E

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ISD4002-120E
Manufacturer:
ISD
Quantity:
552
Part Number:
ISD4002-120EI
Manufacturer:
ISD
Quantity:
20 000
Part Number:
ISD4002-120EY
Manufacturer:
NUVOTON
Quantity:
2 000
Part Number:
ISD4002-120EYI
Manufacturer:
NUVOTON
Quantity:
2 000
Part Number:
ISD4002-120EYI
Manufacturer:
ISD
Quantity:
20 000
PIN NAME
XCLK
SCLK
SOIC /
PDIP
26
28
PIN NO.
TSOP
6
8
External Clock Input: The pin has an internal pull-down
device. The ISD4002 series is configured at the factory with
an internal sampling clock frequency centered to ±1
percent of specification. The frequency is then maintained
to a variation of ±2.25 percent over the entire commercial
temperature and operating voltage ranges. The internal
clock has a –6/+4 percent tolerance over the extended
temperature, industrial temperature and voltage ranges. A
regulated power supply is recommended for industrial
temperature range parts. If greater precision is required,
the device can be clocked through the XCLK pin as follows:
These recommended clock rates should not be varied
because the anti-aliasing and smoothing filters are fixed.
Otherwise, aliasing problems can occur if the sample rate
differs from the one recommended. The duty cycle on the
input clock is not critical, as the clock is immediately
divided by two. If the XCLK is not used, this input must
be connected to ground.
Serial Clock: This is the input clock to the ISD4002 device.
It
microcontoller) and is used to synchronize the data transfer
in and out of the device through the MOSI and MISO lines,
respectively. Data is latched into the ISD4002 on the rising
edge of SCLK and shifted out of the device on the falling
edge of SCLK.
is
ISD4002-120
ISD4002-150
ISD4002-180
ISD4002-240
- 10 -
Part Number
generated
by
Sample Rate
FUNCTION
8.0 kHz
6.4 kHz
5.3 kHz
4.0 kHz
the
ISD4002 SERIES
master
Required Clock
device
819.2 kHz
682.7 kHz
1024 kHz
512 kHz
(typically

Related parts for ISD4002-120E