MAX97001EWP+T Maxim Integrated Products, MAX97001EWP+T Datasheet - Page 32

• Manufacturer Part Number: MAX97001EWP+T
• Description: IC AUDIO SUBSYSTEM 20WLP
• Manufacturer: Maxim Integrated Products
• Series: DirectDrive™r
• Type: Class Dr

Specifications of MAX97001EWP+T

• Output Type: 1-Channel (Mono) with Stereo Headphones
• Max Output Power X Channels @ Load: 920mW x 1 @ 8 Ohm; 37mW x 2 @ 16 Ohm
• Voltage - Supply: 2.7 V ~ 5.5 V
• Features: Depop, Differential Inputs, I²C, Mute, Shutdown, Volume Control
• Mounting Type: Surface Mount
• Package / Case: 20-WLP
• Product: Class-D
• Output Power: 550 mW, 700 mW, 920 mW
• Available Set Gain: 12 dB
• Common Mode Rejection Ratio (min): 32 dB, 55 dB
• Thd Plus Noise: 0.05 %
• Operating Supply Voltage: 2.7 V to 5.5 V
• Supply Current: 2.7 V
• Maximum Power Dissipation: 1040 mW
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Input Signal Type: Differential, Single
• Minimum Operating Temperature: - 40 C
• Output Signal Type: Differential
• Supply Voltage (max): 5.5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: MAX97001EWP+T

Audio Subsystem with Mono Class D Speaker
and Class H Headphone Amplifiers
Figure 10. Writing One Byte of Data to the MAX97001
Figure 11. Writing n-Bytes of Data to the MAX97001
Send the slave address with the R/W bit set to 1 to initiate
a read operation. The MAX97001 acknowledges receipt
of its slave address by pulling SDA low during the 9th
SCL clock pulse. A START command followed by a read
command resets the address pointer to register 0x00.
The first byte transmitted from the MAX97001 is the con-
tents of register 0x00. Transmitted data is valid on the
rising edge of SCL. The address pointer autoincrements
after each read data byte. This autoincrement feature
allows all registers to be read sequentially within one
continuous frame. A STOP condition can be issued after
any number of read data bytes. If a STOP condition is
issued followed by another read operation, the first data
byte to be read is from register 0x00.
The address pointer can be preset to a specific register
before a read command is issued. The master presets
32
S
ACKNOWLEDGE FROM MAX97001
S
SLAVE ADDRESS
SLAVE ADDRESS
ACKNOWLEDGE FROM MAX97001
R/W
0
A
R/W
ACKNOWLEDGE FROM MAX97001
0
REGISTER ADDRESS
Read Data Format
A
ACKNOWLEDGE FROM MAX97001
REGISTER ADDRESS
ACKNOWLEDGE FROM MAX97001
A
B7 B6
the address pointer by first sending the MAX97001’s
slave address with the R/W bit set to 0 followed by the
register address. A REPEATED START condition is then
sent followed by the slave address with the R/W bit set
to 1. The MAX97001 then transmits the contents of the
specified register. The address pointer autoincrements
after transmitting the first byte.
The master acknowledges receipt of each read byte
during the acknowledge clock pulse. The master must
acknowledge all correctly received bytes except the last
byte. The final byte must be followed by a not acknowl-
edge from the master and then a STOP condition. Figure
12 illustrates the frame format for reading one byte from
the MAX97001. Figure 13 illustrates the frame format for
reading multiple bytes from the MAX97001.
B5 B4
DATA BYTE 1
1 BYTE
B3 B2
REGISTER ADDRESS POINTER
AUTOINCREMENT INTERNAL
B1 B0
A
B7
A
B6
ACKNOWLEDGE FROM MAX97001
ACKNOWLEDGE FROM MAX97001
B5
B7 B6
DATA BYTE
B4
1 BYTE
B5 B4
B3
DATA BYTE n
1 BYTE
B2
REGISTER ADDRESS POINTER
B3 B2
AUTOINCREMENT INTERNAL
B1
B1 B0
B0
A
A
P
P