ISPLSI2096-80LQ Lattice Semiconductor Corp., ISPLSI2096-80LQ Datasheet
ISPLSI2096-80LQ
Specifications of ISPLSI2096-80LQ
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ISPLSI2096-80LQ Summary of contents
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... Interconnectivity — Lead-Free Package Options Copyright © 2006 Lattice Semiconductor Corp. All brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice. LATTICE SEMICONDUCTOR CORP., 5555 Northeast Moore Ct., Hillsboro, Oregon 97124, U.S.A. ...
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Functional Block Diagram Figure 1. ispLSI 2096/A Functional Block Diagram Output Routing Pool (ORP) I I/O 1 I/O 2 I/O 3 I I/O 6 I/O 7 I I/O 10 I/O ...
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Absolute Maximum Ratings Supply Voltage V ...................................-0.5 to +7.0V cc Input Voltage Applied ........................ -2 Off-State Output Voltage Applied ..... -2 Storage Temperature ................................ -65 to 150°C Case Temp. with Power Applied .............. -55 to 125°C ...
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Switching Test Conditions Input Pulse Levels Input Rise and Fall Time 10% to 90% Input Timing Reference Levels Output Timing Reference Levels Output Load 3-state levels are measured 0.5V from steady-state active level. Output Load Conditions (see Figure 2) TEST ...
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External Timing Parameters 4 TEST 2 PARAMETER # COND Data Propagation Delay, 4PT Bypass, ORP Bypass pd1 Data Propagation Delay pd2 f max A 3 Clock Frequency with Internal Feedback f max (Ext.) – ...
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Internal Timing Parameters 2 PARAMETER # Inputs t 20 Input Buffer Delay Dedicated Input Delay din GRP t 22 GRP Delay grp GLB Product Term Bypass Comb. Path Delay 4ptbpc t 4ptbpr 24 4 ...
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Timing Model I/O Cell Ded. In #21 I/O Delay I/O Pin #20 (Input) #45 Reset #43, 44 Y0,1,2 #42 GOE 0 Derivations of su, h and co from the Product Term Clock ...
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Power Consumption Power consumption in the ispLSI 2096 and 2096A de- vices depends on two primary factors: the speed at which the device is operating and the number of Product Terms Figure 4. Typical Device Power Consumption vs fmax 300 ...
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Pin Description NAME PQFP & TQFP PIN NUMBERS I I/O 5 21, 22, 23, I I/O 11 27, 28, 29, I I/O 17 34, 35, 36, I I/O 23 40, 41, 42, ...
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Pin Configuration ispLSI 2096/A 128-pin PQFP and TQFP Pinout Diagram GND ...
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Part Number Description ispLSI XXXXX Device Family Device Number 1 2096 2096A Speed f 125 = 125 MHz max f 100 = 100 MHz max MHz max 1. Discontinued per PCN #02-06. Contact Rochester Electronics for ...
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Ordering Information (Cont.) Lead-Free Packaging FAMILY fmax (MHz) tpd (ns) 125 125 100 ispLSI 100 81 81 FAMILY fmax (MHz) tpd (ns) 81 ispLSI 81 Revision History Date Version — 08 August 2006 09 Specifications ispLSI 2096/A COMMERCIAL ...