LC74761 Sanyo Semiconductor Corporation, LC74761 Datasheet

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LC74761

Manufacturer Part Number
LC74761
Description
On-screen display IC
Manufacturer
Sanyo Semiconductor Corporation
Datasheet

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LC74761
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FUJ
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LC74761M-9847
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SONYO
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LC74761M-9847
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Overview
The LC74761 and LC74761M are on-screen display
CMOS LSIs that superimpose text and low-level graphics
onto a TV screen (video signal) under microcontroller.
The display characters have a 12 by 18 dots structure, and
256 characters are provided.
Features
• Display structure: 12 lines by 24 characters (up to 288
• Maximum character display: Up to 288 characters
• Character configuration: 12 (W) by 18 (H) dots structure
• Number of characters: 256 characters (254 plus space 1
• Character sizes: Three sizes (normal, double, and triple
• Display starting positions: 64 horizontal and 64 vertical
• Reverse video function: Characters can be inverted on a
• Flashing types: Two types with periods of 0.5 and 1.0
• Background color: One of eight colors (when internal
• External control input: Serial data input in 8-bit units
• Built-in horizontal/vertical sync separation circuit, AFC
• Video output: Composite video signal output in NTSC,
Ordering number :EN4846A
characters)
font and transparent space 1 font)
sizes)
locations
per character basis.
second on a per character basis (duty fixed at 50%)
synchronization used)
circuit, and synchronization detector
PAL, PAL-M, PAL-N, PAL60, NTSC4.43, or SECAM
format
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-0005 JAPAN
Package Dimensions
unit: mm
3196-DIP30SD
unit: mm
3216A-MFP30S
On-Screen Display LSI
13096HA (OT)/N2894TH (OT) No. 4846-1/20
LC74761, 74761M
[LC74761M]
[LC74761]
SANYO: DIP30SD
SANYO: MFP30S
CMOS IC

Related parts for LC74761

LC74761 Summary of contents

Page 1

... Ordering number :EN4846A Overview The LC74761 and LC74761M are on-screen display CMOS LSIs that superimpose text and low-level graphics onto a TV screen (video signal) under microcontroller. The display characters have dots structure, and 256 characters are provided. Features • Display structure: 12 lines by 24 characters (up to 288 characters) • ...

Page 2

... W(SCLK) Minimum input pulse width t W(CS) t SU(CS) Data setup time t SU(SIN) t h(CS) Data hold time t h(SIN) t word One word write time t wt LC74761, 74761M 25°C Conditions pins DD1 DD2 All input pins HSYNC , VSYNC , OUT OUT SYNC pins DET Conditions V pin ...

Page 3

... V Power supply connection DD1 LC74761, 74761M Description Ground connection Connection for the crystal and capacitor used to form the crystal oscillator that generates the internal synchronization signal. The oscillator can be selected with a command switch. Outputs the horizontal synchronization signal (AFC). The output polarity can be selected (metal option) ...

Page 4

... Pin Assignment Serial Data Input Timing LC74761, 74761M Top view No. 4846-4/20 ...

Page 5

... System Block Diagram LC74761, 74761M No. 4846-5/20 ...

Page 6

... However, when the display character data write command (COMMAND1) is written, the system becomes locked in display character data write mode, and the first byte cannot be overwritten. When the CS pin is set high the command state is set to COMMAND0, i.e., display memory write address setting mode. LC74761, 74761M First byte Data ...

Page 7

... LC74761, 74761M Register content Function The command 0 identification code: sets the display memory write address. Display memory line address (from (hexadecimal)) Register content Function Second byte identification code Display memory character address (from (hexadecimal)) Register content Function The command 1 identification code: sets the display memory write address ...

Page 8

... VP1 1 VP0 0 0 (LSB) 1 Note: When the chip is reset by the RST pin, the register states (bits) are all cleared to 0. LC74761, 74761M Register content Function Character code (from (hexadecimal)) Register content Function The command 2 identification code: sets the vertical display position. ...

Page 9

... RST SYS RAM ERS OSC STP RND SEL 1 LC74761, 74761M Register content Function The command 3 identification code: sets the horizontal display position. SZB0 0 SZB1 0 Normal size Double size 1 Triple size Normal size SZ90 0 SZ91 0 Normal size Double size 1 Triple size ...

Page 10

... PH2 PH1 PH0 INT/EXT 1 LC74761, 74761M Register content Function Second byte identification code Interlaced Non-interlaced BLK0 0 BLK1 0 Blanking off Character size blanking 1 Frame size blanking Total area blanking Flashing period about 0.5 s Flashing period about 1 s Highlight function Flashing function ...

Page 11

... MOD1 MOD0 1 LC74761, 74761M Register content Function Second byte identification code Normal operation Test mode Sets the character intensity level to about 85 IRE (bright white). Sets the character intensity level to about 72 IRE (white with a touch of grey). Sets the blanking intensity level to about 3 IRE (a deep black as a frame level) ...

Page 12

... LIN1 LIN0 1 Note: When the chip is reset by the RST pin, the register states (bits) are all cleared to 0. LC74761, 74761M Register content Function Second byte identification code Normal mode Half internal synchronous mode Half tone output High output in internal synchronous mode In SECAM mode, only the character frame area is on ...

Page 13

... LINS 1 LC74761, 74761M Register content Function The command 7 identification code: sets display control parameters Expansion command 1 identification code Selects lower 6 bits (0 to 5). Selects upper 6 bits (6 to B). Register content Function Second byte identification bit Normal display Apply frame to inverted characters also. ...

Page 14

... HOUT 0 SEL 1 Note: When the chip is reset by the RST pin, the register states (bits) are all cleared to 0. LC74761, 74761M Register content Function Second byte identification bit Normal MOD3 (P14) output (PS1 = 1) Specifies MOD3 general port output Normal MOD2 (P13) output (PS1 = 1) ...

Page 15

... The display consists of 12 rows of 24 characters each 288 characters can be displayed unless enlarged characters are displayed. Display memory addresses are expressed as a row address in the range (hexadecimal) and a column address in the range (hexadecimal). Display Configuration and Display Memory Addresses 24 characters by 12 rows LC74761, 74761M No. 4846-15/20 ...

Page 16

... Composite Video Signal Output Levels (internally generated levels) Metal Option LC74761, 74761M No. 4846-16/20 ...

Page 17

... Composite Video Signal Output Levels (internally generated levels) Metal Option LC74761, 74761M No. 4846-17/20 ...

Page 18

... Composite Video Signal Output Levels (internally generated levels) Metal Option LC74761, 74761M No. 4846-18/20 ...

Page 19

... Application Circuit Diagram Signal format 4 Fsc (MHz) NTSC 3.579545 4 PAL 4.433618 4 SECAM 4.433618 4 PAL-M 3.575611 4 PAL-N 3.582056 4 NTSC4.43 4.433618 4 PAL60 4.433618 4 Note: Fix SW1 to SW4 to 0 when setting a mode by command. LC74761, 74761M Signal format SW1 SW2 SW3 NTSC PAL SECAM 1 (1) (1) PAL PAL NTSC4 ...

Page 20

... SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties. This catalog provides information as of January 1996. Specifications and information herein are subject to change without notice. LC74761, 74761M PS No. 4846-20/20 ...

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