HPDL1414 Avago Technologies, HPDL1414 Datasheet
HPDL1414
Available stocks
Related parts for HPDL1414
HPDL1414 Summary of contents
Page 1
HDLx-2416 Series Four Character 5.0 mm (0.2 inch) Smart 5x7 Alphanumeric Displays Data Sheet Description These are 5.0 mm (0.2 inch) four character dot matrix displays driven by an on-board CMOS IC. These displays are pin for ...
Page 2
The address and data inputs can be directly connected to the microprocessor address and data buses. The HDLX-2416 has several enhancements over the HPDL- 2416. These features include an expanded character set, internal 8 level dimming control, external dimming capa- ...
Page 3
Character Set ASCII CODE HEX ...
Page 4
Recommended Operating Conditions Parameter Symbol Supply Voltage V DD Electrical Characteristics over Operating Temperature Range 4.5 < V < 5.5 V (unless otherwise specified) DD All Devices Parameter Symbol I Blank I (blnk Input Current I I Input ...
Page 5
Optical Characteristics at 25° 5 Full Brightness DD HDLS/HDLU-2416 Part Number Parameter HDLS-2416 Average Luminous Intensity per Digit, Character Average HDLU-2416 All Peak Wavelength Dominant Wavelength HDLO-2416 Parameter Average Luminous Intensity per Digit, Character Average ...
Page 6
AC Timing Characteristics over Operating Temperature Range at V Parameter Symbol Address Setup t AS Address Hold t AH Data Setup t DS Data Hold t DH Chip Enable Setup t CES Chip Enable Hold t CEH Write Time t ...
Page 7
Electrical Description Pin Function Chip Enable (CE and CE and pins 1 and 2) 2 Clear (CLR, pin 3) When CLR is a logic 0 the ASCII RAM is reset to 20hex (space) and the ...
Page 8
CHARACTER RAM 2 WRITE A – ADDRESS 7 D – D DATA WRITE READ ADDRESS CLR CLR ATTRIBUTE RAM D DIGIT CURSOR 0 DIGIT ...
Page 9
Display Clear Data stored in the Character RAM, Control Register, and Attribute RAM will be cleared if the clear (CLR) is held low for a minimum of 10 µs. Note that the display will be cleared regardless of the state ...
Page 10
Figure 3 shows how the Extended Function Disable (bit D of the Control Register), Master Blank (bit D 6 the Control Register), Digit Blank Disable (bit D Attribute RAM), and BL input can be used to blank the display. When ...
Page 11
(PIN 18) 10 kHz 1 k OUTPUT 1N914 555 6 250 LOG 400 pF Figure 4. Intensity modulation control using an astable multivibrator (reprinted with permission from ...
Page 12
... For product information and a complete list of distributors, please go to our website: Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies Limited in the United States and other countries. Data subject to change. Copyright © 2008 Avago Technologies Limited. All rights reserved. Obsoletes 5989-3190EN ...