Jess Brown, Guy Moxey
INTRODUCTION
Power MOSFETs have become the standard choice as the
main switching device for low-voltage (<200 V) switchmode
power-supply (SMPS) converter applications. However using
manufacturers’ datasheets to choose or size the correct
device for a specific circuit topology is becoming increasingly
difficult. The main criteria for MOSFET selection are the power
loss associated with the MOSFET (related to the overall
efficiency of the SMPS) and the power-dissipation capability
of the MOSFET (related to the maximum junction temperature
and thermal performance of the package). This application
note focuses on the basic characteristics and understanding
of the MOSFET.
There are several factors which affect the gate
MOSFET, and it is necessary to understand the fundamental
basis of the device structure before the MOSFET behavior can
be explained. This application note details the basic structure
of the Trench MOSFET structure, identifying the parasitic
components and defining related
describes how and why the parasitic parameters occur.
With a large variety of topologies, switching speeds, load
currents, and output voltages
impossible to identify a generic MOSFET that offers the best
performance across the wide range of circuit conditions. In
some circumstances
dominate, and in others it is the switching losses of the
transient current and voltage waveforms, or
associated with driving the gate of the device. It also has been
shown
dominant loss.
INTRODUCING THE FIGURE OF MERIT FOR
MOSFET SELECTION
To add to this confusion,
MOSFET
conditions, diminishing designers’ ability to compare like for
like. Therefore, the only true method of making the correct
MOSFET choice is to compare a selection of devices within
the circuit in which the MOSFET will be used.
There are methods available that, though sometimes difficult
to implement, enable the designer to compare MOSFETs that
appear suited for a given application. One method
evaluating MOSFETs is according to “figure of merit.” In its
simplest form, the figure of merit compares gate charge (Q
against r
certain device technology, which is effectively scalable to
Document Number: 71933
08-Sep-03
1,2
DS(on)
that the input and output capacitances can be the
parameters at different static and dynamic
Understanding MOSFET Characteristics Associated
. The result of this multiplication relates to a
the on-resistance (r
device manufacturers specify
available, it has become
terminology. It also
With The Figure of Merit
Power MOSFET Basics:
DS(on)
the losses
) losses
of the
for
g
)
achieve the required r
r
comparing devices is the “Baliga high-frequency figure of
merit,”
switching loss will be associated with the charging and
discharging of the input capacitance (C
uses the “new high-frequency figure of merit,” NHFFOM
which assumes that the dominant switching loss is due to the
charging and discharging of the output capacitance (C
The latter two methods are geared towards the applications in
which the MOSFETs will be implemented. However, these
methods only allow like-for-like comparisons; they do not
enable the user to determine that a device with one figure of
merit is necessarily better than a different device with another.
Figure 1 shows the Q
Vishay Siliconix’s range of 30-V SO-8 n-channel MOSFETs.
The Si4888DY, for example, may be better in certain switching
applications than the Si4842DY, but it is not possible to use this
graph—or other graphs using more complex
merit—to determine objectively the best device for a specific
application.
DS(on)
1.
2.
FIGURE 1. Typical figure of merit for Vishay Siliconix n-channel,
IEEE Electron Device Letters, Vol. 10, No. 10, October 1989, “Power
Semiconductor Device Figure of Merit for High Frequency applications,”
B. Jayant Baliga.
Proc. of 1995 Int. Sym. on Power Semiconductor Devices and ICs,
Hokohama, “New Power Device Figure of Merit for High-Frequency
Applications,” IL-Jung Kim, Satoshi Mastumoto, Tatsuo Sakai, and
Toshiaka Yachi.
0.015
0.014
0.013
0.012
0.011
0.010
0.009
0.008
0.005
0.006
0.007
the higher the gate charge will be. A similar method for
BHFFOM
10
30-V SO-8 MOSFETs
Si4886
Si4888
15
1
, which assumes that the
g
Si4842
S Siliconix V
DS(on)
Si4880
x r
Gate Charge (nC)
DS(on)
20
Si4872
or Q
Si4822
figure of merit for a sample of
25
GS
g
Vishay Siliconix
. However, the lower the
= 4.5 V
Si4874
30
Si4420
iss
Si4442
). A third method
Si4430
35
www.vishay.com
AN605
figures of
dominant
40
oss
2
).
1
,