CY7C025-55JC Cypress Semiconductor Corporation., CY7C025-55JC Datasheet
CY7C025-55JC
Specifications of CY7C025-55JC
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CY7C025-55JC Summary of contents
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... The CY7C024/0241 and CY7C025/0251 are available in 84-pin Lead (Pb)-free PLCCs, 84-pin PLCCs (CY7C024 and CY7C025 only), 100-pin Lead (Pb)-free Thin Quad Plastic Flatplack (TQFP) and 100-pin Thin Quad Plastic Flatpack. • 3901 North First Street • ...
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... I Notes: 1. BUSY is an output in master mode and an input in slave mode. 2. I/O –I/O on the CY7C0241/0251 I/O –I/O on the CY7C0241/0251 the CY7C025/0251. 12L the CY7C025/0251. 12R Document #: 38-06035 Rev. *C I/O I/O CONTROL CONTROL MEMORY ADDRESS ADDRESS ARRAY DECODER DECODER INTERRUPT CE CE SEMAPHORE ...
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... I/O 10 15L I/O 11 16L GND I/O 23 17R Document #: 38-06035 Rev. *C 100-Pin TQFP Top View CY7C024 100-Pin TQFP Top View CY7C0241/0251 CY7C024/0241 CY7C025/0251 INT 65 L BUSY 64 L GND 63 M/S 62 BUSY 61 R INT INT 65 L BUSY 64 L GND 63 M/S ...
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... CY7C024/0241, 1FFF for the CY7C025/0251) is the mailbox for the right port and the second-highest memory location (FFE for the CY7C024/0241, 1FFE for the CY7C025/0251) is the mailbox for the left port. When one port writes to the other port’s mailbox, an interrupt is generated to the owner. The interrupt is reset when the owner reads the contents of the mailbox ...
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... Busy The CY7C024/0241 and CY7C025/0251 provide on-chip arbitration to resolve simultaneous memory location access (contention). If both ports’ CEs are asserted and an address match occurs within t of each other, the busy logic will PS determine which port has access will definitely gain permission to the location, but which one is not predictable ...
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... Right port writes 1 to semaphore Left port writes 1 to semaphore Right port writes 0 to semaphore Right port writes 1 to semaphore Left port writes 0 to semaphore Left port writes 1 to semaphore Notes and A , 1FFF/1FFE for the CY7C025. 0L–12L 0R–12R 7. If BUSY =L, then no change BUSY =L, then no change. L Document #: 38-06035 Rev ...
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... MAX Test Conditions V = Min –4 Min 4 GND ≤ V ≤ ≤ CY7C024/0241 CY7C025/0251 [10] ........................................–0.5V to +7.0V Ambient Temperature ± 10% 0°C to +70°C 5V ± 10% –40°C to +85°C 7C024/0241–15 7C024/0241–25 7C025/0251–15 7C025/0251–25 Unit 2.4 0.4 0.4 2.2 0.8 –0.7 ...
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... 250Ω TH OUTPUT C = 30pF V = 1.4V TH (b) Thévenin Equivalent (Load 1) ALL INPUT PULSES 90% 90% 10% 10% ≤ ≤ CY7C024/0241 CY7C025/0251 7C024/0241–35 7C024/0241–55 7C025/0251–35 7C025/0251–55 Min. Typ. Max. Min. Typ. Max. 160 230 150 230 160 260 150 260 ...
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... Min. Max. Min. Max. Min less than t and t is less than t HZCE LZCE HZOE CY7C024/0241 CY7C025/0251 7C024/0241–55 7C025/0251–55 Max. Min. Max. Unit time. SCE . LZOE Page [+] Feedback ...
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... Min. Max. Min. Max Note 20 Note Timing V 4. reaches the CC Parameter ICC DR1 – – t (actual (actual). WDD PWE DDD SD CY7C024/0241 CY7C025/0251 7C024/0241–55 7C025/0251–55 Min. Max. Min. Max. Unit Note 20 Note Data Retention Mode 4.5V > 2. ...
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... To access RAM SEM = Document #: 38-06035 Rev. *C [22, 23, 24 DATA VALID [22, 25, 26] t ACE t DOE t LZOE t LZCE LZCE t ABE t ACE t LZCE . This waveform cannot be used for semaphore reads access semaphore SEM = CY7C024/0241 CY7C025/0251 t OHA t HZCE t HZOE DATA VALID OHA t HZCE t HZCE Page [+] Feedback ...
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... If the CE or SEM LOW transition occurs simultaneously with or after the R/W LOW transition, the outputs remain in the high-impedance state. Document #: 38-06035 Rev. *C [27, 28, 29, 30 [30] t PWE [33] t HZWE t SD [27, 28, 29, 35 SCE PWE . IH . CY7C024/0241 CY7C025/0251 [33] t HZOE LZWE NOTE allow the I/O drivers to turn off and data to be HZWE SD Page [+] Feedback ...
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... SPS Document #: 38-06035 Rev. *C [36 VALID ADRESS SCE SOP t SD DATA VALID PWE t SWRD t SOP WRITE CYCLE READ CYCLE [37, 38, 39] MATCH t SPS MATCH = HIGH. L CY7C024/0241 CY7C025/0251 t OHA t ACE DATA VALID OUT t DOE Page [+] Feedback ...
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... Timing Diagram of Read with BUSY (M/S=HIGH) ADDRESS R R/W R DATA ADDRESS L BUSY L DATA OUTL Write Timing with Busy Input (M/S=LOW) R/W BUSY Note: 40 LOW Document #: 38-06035 Rev. *C [40 MATCH t PWE t SD VALID MATCH t BLA t WDD t PWE CY7C024/0241 CY7C025/0251 BHA t BDD t DDD VALID Page [+] Feedback ...
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... BUSY will be asserted. PS Document #: 38-06035 Rev. *C [41] ADDRESS MATCH BLC ADDRESS MATCH BLC [41 ADDRESS MISMATCH t t BLA BHA ADDRESS MISMATCH t t BLA BHA CY7C024/0241 CY7C025/0251 t BHC t BHC Page [+] Feedback ...
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... Switching Waveforms (continued) Interrupt Timing Diagrams Left Side Sets INT : R ADDRESS WRITE FFF (1FFF CY7C025 R/W L INT R [43] t INS Right Side Clears INT : R ADDRESS R INT R Right Side Sets INT : L ADDRESS WRITE FFE (1FFE CY7C025 R/W R INT L [43] t INS Left Side Clears INT ...
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... Ordering Information ( Dual-Port SRAM) Speed (ns) Ordering Code 15 CY7C025–15AC CY7C025-15AXC CY7C025–15JC CY7C025-15JXC CY7C025–15AI CY7C025-15AXI Document #: 38-06035 Rev. *C Package Name Package Type A100 100-Pin Thin Quad Flat Pack A100 100-Pin Lead Free Thin Quad Flat Pack J83 84-Lead Plastic Leaded Chip Carrier ...
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... CY7C025–25AI CY7C025-25AXI CY7C025–25JI CY7C025-25JXI 35 CY7C025–35AC CY7C025-35AXC CY7C025–35JC CY7C025-35JXC CY7C025–35AI CY7C025-35AXI CY7C025–35JI CY7C025-35JXI 55 CY7C025–55AC CY7C025-55AXC CY7C025–55JC CY7C025-55JXC CY7C025–55AI CY7C025-55AXI CY7C025–55JI CY7C025-55JXI Ordering Information ( Dual-Port SRAM) Speed (ns) Ordering Code 15 CY7C0241–15AC CY7C0241-15AXC CY7C0241–15AI ...
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... CY7C0251–25AC CY7C0251-25AXC CY7C0251–25AI CY7C0251–25AXI 35 CY7C0251–35AC CY7C0251–35AXC CY7C0251–35AI CY7C0251–35AXI 55 CY7C0251–55AC CY7C0251–55AXC CY7C0251–55AI CY7C0251–55AXI Document #: 38-06035 Rev. *C Package Name Package Type A100 100-Pin Thin Quad Flat Pack A100 100-Pin Lead Free Thin Quad Flat Pack ...
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... The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. CY7C024/0241 CY7C025/0251 51-85048-*B 51-85006-*A ...
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... Document History Page Document Title: CY7C024/0241, CY7C025/0251 4K x 16/18 and 8K x 16/18 Dual-Port Static RAM with Sem, Int, Busy Document Number: 38-06035 REV. ECN NO. Issue Date Change ** 110177 09/29/01 *A 122286 12/27/02 *B 236754 See ECN *C 279132 See ECN Document #: 38-06035 Rev. *C Orig. of ...