AM29DL322GT70WMI Advanced Micro Devices, AM29DL322GT70WMI Datasheet

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AM29DL322GT70WMI

Manufacturer Part Number
AM29DL322GT70WMI
Description
Manufacturer
Advanced Micro Devices
Datasheet
Am29DL400B
Data Sheet
RETIRED
PRODUCT
This product has been retired and is not recommended for designs. For new and current designs,
S29AL004D supersedes Am29DL400B and is the factory-recommended migration path. Please refer
to the S29AL004D datasheet for specifications and ordering information. Availability of this docu-
ment is retained for reference and historical purposes only.
April 2005
The following document specifies Spansion memory products that are now offered by both Advanced
Micro Devices and Fujitsu. Although the document is marked with the name of the company that
originally developed the specification, these products will be offered to customers of both AMD and
Fujitsu.
Continuity of Specifications
There is no change to this datasheet as a result of offering the device as a Spansion product. Any
changes that have been made are the result of normal datasheet improvement and are noted in the
document revision summary, where supported. Future routine revisions will occur when appro-
priate, and changes will be noted in a revision summary.
For More Information
Please contact your local AMD or Fujitsu sales office for additional information about Spansion
memory solutions.
Publication Number 21606
Revision E
Amendment +4
Issue Date June 7, 2005

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AM29DL322GT70WMI Summary of contents

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Data Sheet This product has been retired and is not recommended for designs. For new and current designs, S29AL004D supersedes Am29DL400B and is the factory-recommended migration path. Please refer to the S29AL004D datasheet for specifications and ordering information. Availability of ...

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Am29DL400B 4 Megabit (512 K x 8-Bit/256 K x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory This product has been retired and is not recommended for designs. For new and current designs, S29AL004D supersedes Am29DL400B and is the factory-recommended ...

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GENERAL DESCRIPTION The Am29DL400B Mbit, 3.0 volt-only flash memory device, organized as 262,144 words or 524,288 bytes. The device is offered in 44-pin SO and 48-pin TSOP packages. The word-wide (x16) data appears on DQ0–DQ15; the byte-wide ...

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TABLE OF CONTENTS Product Selector Guide .......................................... 4 Block Diagram......................................................... 4 Connection Diagrams ............................................. 5 Connection diagramS ............................................. 6 Pin Description........................................................ 7 Logic Symbol .......................................................... 7 Ordering Information .............................................. 8 Device Bus Operations........................................... 9 Table 1. Am29DL400B Device Bus Operations ...

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PRODUCT SELECTOR GUIDE Family Part Number Speed Options (Full Voltage Range 2.7 – 3.6 V) Max Access Time (ns) CE# Access (ns) OE# Access (ns) Note: See “AC Characteristics” for full specifications. BLOCK DIAGRAM ...

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CONNECTION DIAGRAMS A15 1 A14 2 A13 3 A12 4 A11 5 A10 WE# 11 RESET RY/BY A17 ...

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CONNECTION DIAGRAMSPIN DESCRIPTION RY/BY# NC A17 CE OE# DQ0 DQ8 DQ1 DQ9 DQ2 DQ10 DQ3 DQ11 PIN DESCRIPTION A0-A17 = 18 Addresses DQ0-DQ14 = 15 Data Inputs/Outputs DQ15/A-1 = DQ15 ...

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ORDERING INFORMATION Standard Products AMD standard products are available in several packages and operating ranges. The order number (Valid Com- bination) is formed by a combination of the following: Am29DL400B DEVICE NUMBER/DESCRIPTION Am29DL400B 4 Megabit (512 ...

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DEVICE BUS OPERATIONS This section describes the requirements and use of the device bus operations, which are initiated through the internal command register. The com- mand register itself does not occupy any addressable memory location. The register is a latch ...

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The device features an Unlock Bypass mode to fa- cilitate faster programming. Once a bank enters the Unlock Bypass mode, only two write cycles are re- quired to program a word or byte, instead of four. The “Byte/Word Program Command ...

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Output Disable Mode When the OE# input output from the de- IH vice is disabled. The output pins are placed in the high impedance state. Table 2. Am29DL400BT Top Boot Sector Architecture Sector Address Bank Address ...

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Table 3. Am29DL400BB Bottom Boot Sector Architecture Sector Address Bank Address Bank Sector A17 A16 A15 SA13 SA12 SA11 Bank 2 SA10 SA9 SA8 0 ...

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Table 4. Am29DL400B Autoselect Codes (High Voltage Method) Description Mode CE# Manufacturer ID: AMD L Device ID: Word L Am29DL400B Byte L (Top Boot Block) Device ID: Word L Am29DL400B Byte L (Bottom Boot Block) Sector Protection Verification L Note: ...

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START PLSCNT = 1 RESET Wait 1 μs No First Write Temporary Sector Cycle = 60h? Unprotect Mode Yes Set up sector address Sector Protect: Write 60h to sector address with ...

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Hardware Data Protection The command sequence requirement of unlock cy- cles for programming or erasing provides data protection against inadvertent writes (refer to Table 5 for command definitions). In addition, the follow- ing hardware data protection measures prevent accidental erasure ...

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This method is an alternative to that shown in Table 4, which is intended for PROM pro- grammers and requires V on address pin A9. The ID autoselect command sequence may be written to an address within a bank ...

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Write Program Command Sequence Data Poll from System Embedded Program algorithm in progress Verify Data? No Increment Address Last Address? Programming Completed 3. Note: See Table 5 for program command sequence. Figure 3. Program Operation Chip Erase Command Sequence Chip ...

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Figure 4 illustrates the algorithm for the erase opera- tion. Refer to the Erase and Program Operations tables in the AC Characteristics section for parame- ters, and Figure 18 section for timing diagrams. Erase Suspend/Erase Resume Commands The Erase Suspend ...

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COMMAND DEFINITIONS Table 5. Am29DL400B Command Definitions Command Sequence (Note 1) Addr Data Addr Data Read (Note 6) 1 Reset (Note 7) 1 Word Manufacturer ID 4 Byte Word Device ID, 4 Top Boot Block Byte Word Device ID, 4 ...

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WRITE OPERATION STATUS The device provides several bits to determine the status of a write operation in the bank where a pro- gram or erase operation is in progress: DQ2, DQ3, DQ5, DQ6, DQ7, and RY/BY#. Table 6 and the ...

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If the output is low (Busy), the device is actively erasing or programming. (This includes program- ming in the Erase Suspend mode.) If the output is high (Ready), the device is ready to read array data the standby ...

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START Read DQ7–DQ0 Read DQ7–DQ0 No Toggle Bit = Toggle? Yes No DQ5 = 1? Yes Read DQ7–DQ0 Twice Toggle Bit No = Toggle? Yes Program/Erase Operation Not Complete, Write Operation Complete Reset Command Note: The system should recheck the ...

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Status Embedded Program Algorithm Standard Mode Embedded Erase Algorithm Erase Suspended Sector Erase-Suspend- Erase Read Suspend Non-Erase Mode Suspended Sector Erase-Suspend-Program Notes: 1. DQ5 switches to ‘1’ when an Embedded Program or Embedded Erase operation has exceeded the maximum timing ...

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ABSOLUTE MAXIMUM RATINGS Storage Temperature Plastic Packages . . . . . . . . . . . . . .–65°C to +150°C Ambient Temperature with Power Applied . . . . . . . . . . . .–65°C ...

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OPERATING RANGES Commercial (C) Devices Ambient Temperature ( 0°C to +70°C A Industrial (I) Devices Ambient Temperature ( –40°C to +85°C A Operating ranges ...

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DC CHARACTERISTICS CMOS Compatible Parameter Symbol Parameter Description I Input Load Current Input Load Current LIT I Output Leakage Current LO V Active Read Current CC I CC1 (Notes Active Write Current CC I ...

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DC CHARACTERISTICS Zero-Power Flash 500 1000 Note: Addresses are switching at 1 MHz Figure 9. I Current vs. Time (Showing Active and Automatic Sleep Currents) CC1 ...

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TEST CONDITIONS Device Under Test C L 6.2 kΩ Note: Diodes are IN3064 or equivalent Figure 11. Test Setup Test Condition Output Load Output Load Capacitance (including jig capacitance) Input Rise and Fall Times Input Pulse Levels Input ...

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AC CHARACTERISTICS Read-Only Operations Parameter Description JEDEC Std t t Read Cycle Time (Note 1) AVAV Address to Output Delay AVQV ACC t t Chip Enable to Output Delay ELQV Output Enable to Output ...

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AC CHARACTERISTICS Hardware Reset (RESET#) Parameter Description JEDEC Std RESET# Pin Low (During Embedded Algorithms) t Ready to Read Mode (See Note) RESET# Pin Low (NOT During Embedded t Ready Algorithms) to Read Mode (See Note) t RESET# Pulse Width ...

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AC CHARACTERISTICS Word/Byte Configuration (BYTE#) Parameter Description JEDEC Std t t CE# to BYTE# Switching Low or High ELFL/ ELFH t BYTE# Switching Low to Output HIGH Z FLQZ t BYTE# Switching High to Output Active FHQV CE# OE# BYTE# ...

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AC CHARACTERISTICS Erase and Program Operations Parameter Description JEDEC Std t t Write Cycle Time (Note 1) AVAV Address Setup Time AVWL AS Address Setup Time to OE# low during toggle bit t ASO polling t t ...

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AC CHARACTERISTICS Program Command Sequence (last two cycles Addresses 555h CE# OE# WE Data RY/BY VCS Notes program address program data Illustration shows device in word ...

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AC CHARACTERISTICS t WC Valid PA Addresses t AH CE# OE WE# t WPH t DS Valid Data In WE# Controlled Write Cycle Figure 19. Back-to-Back Read/Write Cycle Timings t RC Addresses VA t ACC t CE CE# ...

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AC CHARACTERISTICS Addresses CE# t OEH WE# OE Valid Data DQ6/DQ2 RY/BY# Note Valid address; not required for DQ6. Illustration shows first two status cycle after command sequence, last status read cycle, and array data read ...

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AC CHARACTERISTICS Temporary Sector Unprotect Parameter Description JEDEC Std t V Rise and Fall Time (See Note) VIDR ID RESET# Setup Time for Temporary Sector t RSP Unprotect RESET# Hold Time from RY/BY# High for t RRB Temporary Sector Unprotect ...

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AC CHARACTERISTICS RESET# SA, A6, A1, A0 Sector Protect/Unprotect Data 60h 1 µs CE# WE# OE# * For sector protect For sector unprotect ...

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AC CHARACTERISTICS Alternate CE# Controlled Erase/Program Operations Parameter Description JEDEC Std t t Write Cycle Time (Note 1) AVAV Address Setup Time AVWL Address Hold Time ELAX Data Setup Time DVEH ...

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AC CHARACTERISTICS 555 for program 2AA for erase Addresses WE# OE# CE Data t RH RESET# RY/BY# Notes: 1. Figure indicates last two bus cycles of a program or erase operation ...

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ERASE AND PROGRAMMING PERFORMANCE Parameter Sector Erase Time Chip Erase Time Byte Program Time Word Program Time Byte Mode Chip Program Time (Note 3) Word Mode Notes: 1. Typical program and erase times assume the following ° conditions ...

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LATCHUP CHARACTERISTICS Input voltage with respect all pins except I/O pins SS (including A9, OE#, and RESET#) Input voltage with respect all I/O pins SS V Current CC Includes all pins except V . ...

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PHYSICAL DIMENSIONS* TS 048—48-Pin Standard TSOP * For reference only. BSC is an ANSI standard for Basic Space Centering Am29DL400B Dwg rev AA; 10/99 41 ...

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PHYSICAL DIMENSIONS (continued) TSR048—48-Pin Reverse TSOP * For reference only. BSC is an ANSI standard for Basic Space Centering. 42 Am29DL400B Dwg rev AA; 10/99 ...

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PHYSICAL DIMENSIONS (continued) SO 044—44-Pin Small Outline Am29DL400B Dwg rev AC; 10/99 43 ...

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REVISION SUMMARY Revision A (January 1998) Initial release. Revision B (March 1998) Expanded data sheet from Advance Information to Preliminary version. Revision C (April 1998) Global Changed -70R speed option to -70. Figure 1, In-system Sector Protect/Unprotect Algorithm Added “PSLSCNT=1” ...

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... Trademarks Copyright © 2005 Advanced Micro Devices, Inc. All rights reserved. AMD, the AMD logo, and combinations thereof are registered trademarks of Advanced Micro Devices, Inc. ExpressFlash is a trademark of Advanced Micro Devices, Inc. Product names used in this publication are for identification purposes only and may be trademarks of their respective companies ...

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