CY7C006-25AI Cypress Semiconductor Corporation., CY7C006-25AI Datasheet
CY7C006-25AI
Specifications of CY7C006-25AI
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CY7C006-25AI Summary of contents
Page 1
... Control of a semaphore indicates that a shared re- source is in use. An automatic power-down feature is con- trolled independently on each port by a Chip Enable (CE) pin or SEM pin. The CY7C006 and CY7C016 are available in 68-pin PLCC (CY7C006), 64-pin (CY7C006) TQFP , and 80-pin (CY7C016) TQFP . I/O CONTROL ADDRESS MEMORY ...
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... I/O 2L I/O 3L I/O 4L I/O 5L GND I GND I/O 0R I I/O 3R I/O 4R I/O 5R Note: 3. I/O for CY7C016 only. 68-Pin PLCC Top View CY7C006 64-Pin TQFP Top View CY7C006 CY7C006 CY7C016 INT L 53 BUSY L GND 52 M/S 51 BUSY INT C006 INT L BUSY 42 L ...
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... Semaphores are requested by writing a 0 into the respective location. Interrupt Flag. INT is set when right port writes location 3FFE and is L cleared when left port reads location 3FFE. INT location 3FFF and is cleared when right port reads location 3FFF. Busy Flag Master or Slave Select Power Ground 3 CY7C006 CY7C016 ...
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... V 0.2V One Port Com’ – 0.2V Ind V V – 0. 0.2V, Active IN [5] Port Outputs MAX 4 CY7C006 CY7C016 7C006-35 7C006-55 7C016-35 7C016- 210 200 50 40 Ambient Temperature + – + 7C006-15 7C006-25 7C016-15 7C016-25 Min. Typ. Max. Min. Typ. Max. Unit 2.4 2 ...
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... MHz 5. =250 TH OUTPUT C= (b) Thévenin Equivalent (Load) ALL INPUT PULSES 3.0V 90% 90% 10% 10% GND CY7C006 CY7C016 7C006-35 7C006-55 7C016-35 7C016-55 Min. Typ. Max. Min. Typ. Max. Unit 2.4 2.4 0.4 0.4 2.2 2.2 0.8 0.8 –10 +10 –10 +10 –10 +10 –10 +10 150 210 ...
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... BDD [7] 7C006-15 7C006-25 7C016-15 7C016-25 Min. Max. Min. Max Note 13 Note 13 is less than t and t HZCE LZCE HZOE – t (actual – t (actual). WDD PWE DDD SD 6 CY7C006 CY7C016 7C006-35 7C006-55 7C016-35 7C016-55 Min. Max. Min. Max. Unit ...
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... L, SEM = H when accessing RAM SEM = L when accessing semaphores. L [7] (continued) 7C006-15 7C006-25 7C016-15 7C016-25 Min. Max. Min [15, 16 [15, 17, 18] t ACE t DOE LZOE DATA VALID 7 CY7C006 CY7C016 7C006-35 7C006-55 7C016-35 7C016-55 Max. Min. Max. Min. Max DATA VALID t HZCE t HZOE t PD Unit ns ...
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... R/W must be HIGH during all address transitions. [19, 20 MATCH t PWE t SD VALID MATCH t WDD [21, 22, 23 SCE PWE t SD DATA VALID HIGH IMPEDANCE allow the I/O drivers to turn off and data to be placed on PWE HZWE SD 8 CY7C006 CY7C016 DDD VALID C006- LZOE C006-13 ...
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... CE = HIGH for the duration of the above timing (both write and read cycle). [20, 22, 24 SCE PWE t SD DATA VALID t HZWE HIGH IMPEDANCE [25 VALID ADDRESS SCE SOP t SD DATA VALID PWE t SWRD t SOP WRITE CYCLE READ CYCLE 9 CY7C006 CY7C016 LZWE C006-14 t OHA t ACE DATA VALID OUT t DOE C006-15 ...
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... SPS MATCH t SPS MATCH t WC MATCH t PWE t SD VALID MATCH t BLA t WDD t PWE HIGH CY7C006 CY7C016 C006- BHA t BDD t DDD VALID C006-17 C006-18 ...
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... R 31 depends on which enable pin (CE INS INR L [29] ADDRESS MATCH BLC ADDRESS MATCH BLC [28 ADDRESS MISMATCH t t BLA BHA ADDRESS MISMATCH t t BLA BHA ) is deasserted first R asserted last CY7C006 CY7C016 t BHC C006-19 t BHC C006-20 C006-21 C006-22 ...
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... INT R 31 INS Right Side Clears INT : R ADDRESS R INT R Right Side Sets INT : L ADDRESS R/W R INT L [30] t INS Left Side Clears INT : L ADDRESS R INT WRITE 3FFF [30 INR t WC WRITE 3FFF [30 INR 12 CY7C006 CY7C016 C006- READ 3FFF C006-24 C006- READ 3FFF C006-26 ...
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... Architecture The CY7C006/016 consists array of 16K words of 8/9 bits each of dual-port RAM cells, I/O and address lines, and control signals (CE, OE, R/W). These control pins permit indepen- dent access for reads or writes to any location in memory. To handle simultaneous writes/reads to the same location, a BUSY pin is pro- vided on each port ...
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... Left port writes 0 to semaphore Left port writes 1 to semaphore Ordering Information 16K x8 Dual-Port SRAM Speed (ns) Ordering Code 15 CY7C006-15AC CY7C006-15JC 25 CY7C006-25AC CY7C006-25JC CY7C006-25AI CY7C006-25JI 35 CY7C006-35AC CY7C006-35JC CY7C006-35AI CY7C006-35JI 55 CY7C006-55AC CY7C006-55JC CY7C006-55AI CY7C006-55JI the right port would immediately own the semaphore as soon as the left port released it ...
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... A80 80-Lead Thin Quad Flat Package A80 80-Lead Thin Quad Flat Package A80 80-Lead Thin Quad Flat Package A80 80-Lead Thin Quad Flat Package A80 80-Lead Thin Quad Flat Package 15 CY7C006 CY7C016 Operating Range Commercial Commercial Industrial Commercial Industrial Commercial Industrial ...
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... The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. 80-Pin Thin Plastic Quad Flat Pack A80 68-Lead Plastic Leaded Chip Carrier J81 CY7C006 CY7C016 51-85065-B 51-85005-A ...