CY24206ZC-4 Cypress Semiconductor Corporation., CY24206ZC-4 Datasheet

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CY24206ZC-4

Manufacturer Part Number
CY24206ZC-4
Description
Manufacturer
Cypress Semiconductor Corporation.
Datasheet

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Part Number:
CY24206ZC-4
Quantity:
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Part Number:
CY24206ZC-4
Manufacturer:
CY
Quantity:
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Part Number:
CY24206ZC-4
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Cypress Semiconductor Corporation
Document #: 38-07451 Rev. *B
Features
• Integrated phase-locked loop (PLL)
• Low-jitter, high-accuracy outputs
• 3.3V operation
• Available in 16-pin TSSOP Package
Part Number
XOUT
Logic Block Diagram
Pin Configurations
CY24206-1
CY24206-2
CY24206-3
CY24206-4
XIN
FS1
FS2
FS0
OE
AVDD
AVSS
CLK1
CLK2
VSSL
VDD
XIN
OE
16-pin TSSOP
OSC.
CY24206-1
1
2
3
4
5
6
7
8
Outputs
3
4
4
4
16
15
14
13
12
11
10
Q
9
FS0
FS2
FS1
VSS
N/C
VDDL
REFCLK
XOUT
Φ
Input Frequency
VDDL
P
27 MHz
27 MHz
27 MHz
27 MHz
VCO
PLL
VDD
AVDD
MediaClock™ DTV, STB Clock Generator
AVDD
AVSS
CLK2
VSSL
CLK1
VDD
XIN
OE
1 copy 27-MHz reference clock output
1 copy of 81-/81.081-/74.175-/74.250-MHz (frequency selectable)
1 copy of 27-/27.027-/24.725-/24.75-MHz (frequency selectable)
1 copy 27-MHz reference clock output
1 copy of 81-/81.081-/74.175-/74.250-MHz (frequency selectable)
1 copy of 27-/27.027-/24.725-/24.75-MHz (frequency selectable)
1 copy of 27-/27.027-/74.175-/74.25-MHz (frequency selectable)
1 copy 27-MHz reference clock output
1 copy of 81-/81.081-/74.17582-/74.250-MHz (frequency selectable)
1 copy of 27-/27.027-/24.725-/24.75-MHz (frequency selectable)
1 copy of 27-/27.027-/74.175-/74.25-MHz (frequency selectable)
1 copy 27-MHz reference clock output
1 copy of 81-/81.081-/74.17582-/74.250-MHz (frequency selectable)
1 copy of 27-/27.027-/24.725-/24.75-MHz (frequency selectable)
1 copy of 27-/27.027-/74.175-/74.25-MHz (frequency selectable)
3901 North First Street
AVSS
16-pin TSSOP
CY24206-2,3,4
1
2
3
4
5
6
7
8
MULTIPLEXER
VSS
DIVIDERS
OUTPUT
AND
VSSL
16
15
14
13
12
11
10
9
FS0
FS2
FS1
VSS
CLK3
VDDL
REFCLK
Benefits
XOUT
• Internal PLL with up to 400-MHz internal operation
• Meets critical timing requirements in complex system
• Enables application compatibility
designs
Output Frequency Range
CLK1
CLK2
REFCLK
CLK3 (-2, -3,-4)
San Jose
,
CA 95134
Revised September 27, 2004
408-943-2600
CY24206
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CY24206ZC-4 Summary of contents

Page 1

Features • Integrated phase-locked loop (PLL) • Low-jitter, high-accuracy outputs • 3.3V operation • Available in 16-pin TSSOP Package Part Number Outputs Input Frequency CY24206 MHz CY24206 MHz CY24206 MHz CY24206 MHz ...

Page 2

Frequency Select Options FS2 FS1 FS0 CLK1 (-1,- 81.081 74.175 74.250 81.081 74.175 74.250 ...

Page 3

Absolute Maximum Conditions Parameter Description V Supply Voltage DD V I/O Supply Voltage DDL T Junction Temperature J Digital Inputs Electrostatic Discharge Recommended Operating Conditions Parameter Description V /AV /V Operating Voltage DD DDL DDL T Ambient Temperature A C ...

Page 4

... Output Clock Output Figure (0 Ordering Information Ordering Code Package Name CY24206ZC-2 Z16 CY24206ZC-2T Z16 CY24206ZC-3 Z16 CY24206ZC-3T Z16 CY24206ZC-4 Z16 CY24206ZC-4T Z16 Lead Free CY24206ZXC-4 Z16 CY24206ZXC-4T Z16 Document #: 38-07451 Rev Figure 1. Duty Cycle Definitions ...

Page 5

... MediaClock is a trademark of Cypress Semiconductor Corporation. All product and company names mentioned in this document may be the trademarks of their respective holders. Document #: 38-07451 Rev. *B 16-lead TSSOP 4.40 MM Body Z16.173 PIN 1 ID DIMENSIONS IN MM[INCHES] MIN. REFERENCE JEDEC MO-153 6 ...

Page 6

Document History Page Document Title: CY24206 MediaClock™ DTV, STB Clock Generator Document Number: 38-07451 REV. ECN NO. Issue Date ** 120901 12/10/02 *A 123046 03/03/03 *B 270029 See ECN Document #: 38-07451 Rev. *B Orig. of Change Description of Change ...

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