CY26200SC Cypress Semiconductor Corporation., CY26200SC Datasheet
CY26200SC
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CY26200SC Summary of contents
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Features • Integrated phase-locked loop (PLL) • Low-jitter, high-accuracy outputs • 3.3V operation Part Number Outputs Input Frequency Range CY26200 1 19.44 MHz Logic Block Diagram 19.44 XIN OSC XOUT Pin Configuration CY26200 8-pin SOIC 1 XOUT 8 XIN 7 ...
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Pin Summary Pin Name Pin Number XIN 1 19.44-MHz Reference Input AVDD 2 Analog Voltage Supply FS 3 Frequency Select – see Table 1 AVSS 4 Analog Ground VDD 5 Voltage Supply CLK1 6 1.544-MHz/2.048-MHz Clock Output VSS 7 Ground ...
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... CLK 50% Figure 1. Duty Cycle Definition Ordering Information Ordering Code Package Type CY26200SC 8-lead SOIC CY26200SCT 8-lead SOIC - Tape and Reel CY26200SI 8-lead SOIC CY26200SIT 8-lead SOIC - Tape and Reel Lead-free CY26200SXC 8-lead SOIC CY26200SXCT 8-lead SOIC - Tape and Reel ...
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Package Diagram 8 Lead (150 Mil) SOIC - S08 0.189[4.800] 0.196[4.978] 0.050[1.270] BSC 0.0138[0.350] 0.0192[0.487] All product and company names mentioned in this document are the trademarks of their respective holders. Document #: 38-07335 Rev. *B ...
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Document History Page Document Title: CY26200 T1/E1 Clock Generator Document Number: 38-07335 Issue Orig. of REV. ECN No. Date Change ** 111745 05/06/02 *A 121890 12/14/02 *B 400148 See ECN Document #: 38-07335 Rev. *B Description of Change CKN New ...