CY29653AC Cypress Semiconductor Corporation., CY29653AC Datasheet

CY29653AC

Manufacturer Part Number

CY29653AC

Description

Manufacturer

Cypress Semiconductor Corporation.

Datasheet

1.CY29653AC.pdf (7 pages)

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Cypress Semiconductor Corporation

Document #: 38-07477 Rev. *C

Features

Block Diagram

• Output frequency range: 25 MHz to 125 MHz

• Input frequency range (

• 30 ps typical peak cycle-to-cycle jitter

• 30 ps typical out-to-output skew

• 3.3V operation

• Eight Clock outputs: Drive up to 16 clock lines

• One feedback output

• LVPECL reference clock input

• Phase-locked loop (PLL) bypass mode

• Spread Aware™

• Output enable/disable

• Pin-compatible with MPC9653 and MPC953

• Industrial temperature range: –40°C to +85°C

• 32-pin 1.0-mm TQFP package

PECL_CLK#

PECL_CLK

VCO_SEL

BYPASS#

MR/OE#

PLL_EN

FB_IN

Detector

Phase

LPF

200-500MHz

VCO

4): 35 MHz to 125 MHz

8): 25 MHz to 62.5 MHz

÷2

3.3V 125-MHz 8-Output Zero Delay Buffer

•

÷4

3901 North First Street

FB_OUT

Q(0:6)

Description

The CY29653 is a low-voltage high-performance 125-MHz

PLL-based zero delay buffer designed for high-speed clock

distribution applications. The CY29653 features an LVPECL

reference clock input and provides eight outputs plus one

feedback output. VCO output divides by four or eight per

VCO_SEL

LVCMOS-compatible output can drive 50Ω series- or

parallel-terminated transmission lines. For series-terminated

transmission lines, each output can drive one or two traces

giving the device an effective fanout of 1:16.

The PLL is ensured stable given that the VCO is configured to

run between 140 MHz to 500 MHz. This allows a wide range

of output frequencies from 25 MHz to 125 MHz. For normal

operation, the external feedback input, FB_IN, is connected to

the feedback output, FB_OUT. The internal VCO is running at

multiples of the input reference clock set by the feedback

divider (see the Frequency Table).

When PLL_EN is LOW, PLL is bypassed and the reference

clock directly feeds the output dividers. This mode is fully static

and the minimum input clock frequency specification does not

apply. When BYPASS# is set LOW, PLL and output dividers

are bypassed resulting in a 1:9 LVPECL to LVCMOS high

performance fanout buffer. For normal PLL operation both

PLL_EN and BYPASS# are set HIGH.

Pin Configuration

P E C L _ C L K

•

A V D D

F B _ IN

A V S S

setting

N C

San Jose

(see

C Y 2 9 6 5 3

CA 95134

the

Revised April 13, 2004

Function

2 4

2 3

2 2

2 1

2 0

1 9

1 8

1 7

•

Q 1

V D D Q

Q 2

V S S

Q 3

V D D Q

Q 4

V S S

408-943-2600

Table).

CY29653

Each

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CY29653AC Summary of contents

Page 1

Features • Output frequency range: 25 MHz to 125 MHz ÷ • Input frequency range ( 4): 35 MHz to 125 MHz ÷ • Input frequency range ( 8): 25 MHz to 62.5 MHz • typical peak cycle-to-cycle ...

Page 2

Pin Description Pin Name I/O 8 PECL_CLK PECL_CLK 12, 14, 16, Q(7:0) O 18, 20, 22, 24 FB_OUT O 2 FB_IN MR/OE PLL_EN ...

Absolute Maximum Conditions Parameter Description V DC Supply Voltage Operating Voltage Input Voltage Output Voltage OUT V Output termination Voltage TT LU Latch Up Immunity R Power Supply Ripple PS T ...

Page 4

AC Parameters (V = 3.3V ± 5 Parameter Description [7] V Common Mode Range CMR f Maximum Output Frequency MAX DC Output Duty Cycle Output Rise/Fall times Propagation Delay (static phase (φ) ...

Page 5

... 100% Figure 4. Output Duty Cycle (DC) Ordering Information Part Number CY29653AC 32-pin TQFP CY29653ACT 32-pin TQFP – Tape and Reel CY29653AI 32-pin TQFP CY29653AIT 32-pin TQFP – Tape and Reel Document #: 38-07477 Rev. *C VDD VDD/2 GND Figure 5. Output-to-Output Skew t ...

Page 6

Package Drawing and Dimension 32-lead Thin Plastic Quad Flatpack 1.0 mm A32 Spread Aware is a trademark of Cypress Semiconductor. All product and company names mentioned in this document are trademarks of their respective holders. Document ...

Page 7

Document History Page Document Title:CY29653 3.3V 125-MHz 8-Output Zero Delay Buffer Document Number: 38-07477 REV. ECN No. Issue Date ** 126715 05/15/03 *A 130841 11/07/03 *B 209720 See ECN *C 346654 See ECN Document #: 38-07477 Rev. *C Orig. of ...

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CY29653AC Cypress Semiconductor Corporation., CY29653AC Datasheet

CY29653AC

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CY29653AC Summary of contents

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