CY7C132-30PC Cypress Semiconductor Corporation., CY7C132-30PC Datasheet

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CY7C132-30PC

Manufacturer Part Number
CY7C132-30PC
Description
Manufacturer
Cypress Semiconductor Corporation.
Datasheet

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CY7C132-30PC
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Cypress Semiconductor Corporation
Document #: 38-06031 Rev. *C
Features
Notes:
1. CY7C132/CY7C136 (Master): BUSY is open drain output and requires pull-up resistor.
2. Open drain outputs; pull-up resistor required.
• True Dual-Ported memory cells which allow simulta-
• 2K x 8 organization
• 0.65-micron CMOS for optimum speed/power
• High-speed access: 15 ns
• Low operating power: I
• Fully asynchronous operation
• Automatic power-down
• Master CY7C132/CY7C136 easily expands data bus
• BUSY output flag on CY7C132/CY7C136; BUSY input
• INT flag for port-to-port communication (52-pin
• Available in 48-pin DIP (CY7C132/142), 52-pin PLCC and
• Pb-Free packages available
neous reads of the same memory location
width to 16 or more bits using slave CY7C142/CY7C146
on CY7C142/CY7C146
PLCC/PQFP versions)
52-pin TQFP (CY7C136/146)
CY7C142/CY7C146 (Slave): BUSY is input.
Logic Block Diagram
BUSY
INT
R/W
I/O
I/O
A
CE
OE
A
L
L
10L
[1]
7L
0L
[2]
0L
L
L
L
DECODER
ADDRESS
R/W
CC
CE
OE
L
L
L
CONTROL
= 110 mA (max.)
I/O
(7C132/7C136 ONLY)
(7C136/7C146 ONLY)
INTERRUPTLOGIC
ARBITRA TION
MEMORY
ARRAY
LOGIC
AND
198 Champion Court
CONTROL
I/O
DECODER
ADDRESS
CE
OE
R/W
R
R
R
Functional Description
The
high-speed CMOS 2K by 8 dual-port static RAMs. Two ports
are provided to permit independent access to any location in
memory. The CY7C132/ CY7C136 can be utilized as either a
standalone 8-bit dual-port static RAM or as a MASTER
dual-port RAM in conjunction with the CY7C142/CY7C146
SLAVE dual-port device in systems requiring 16-bit or greater
word widths. It is the solution to applications requiring shared
or buffered data such as cache memory for DSP, bit-slice, or
multiprocessor designs.
Each port has independent control pins; chip enable (CE),
write enable (R/W), and output enable (OE). BUSY flags are
provided on each port. In addition, an interrupt flag (INT) is
provided on each port of the 52-pin PLCC version. BUSY
signals that the port is trying to access the same location
currently being accessed by the other port. On the PLCC
version, INT is an interrupt flag indicating that data has been
placed in a unique location (7FF for the left port and 7FE for
the right port).
An automatic power-down feature is controlled independently
on each port by the chip enable (CE) pins.
The CY7C132/CY7C142 are available in 48-pin DIP. The
CY7C136/CY7C146 are available in 52-pin PLCC and PQFP.
2K x 8 Dual-Port Static RAM
CY7C132/CY7C136/CY7C142
San Jose
INT
A
A
R/W
CE
OE
I/O
I/O
BUSY
0R
10R
R
7R
0R
R
R
R
[2]
R
[1]
,
CA 95134-1709
CY7C132/CY7C136
CY7C142/CY7C146
Revised September 1, 2005
Pin Configuration
BUSY
A
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
R/W
GND
OE
CE
10L
A
A
A
A
A
A
A
A
A
A
0L
1L
2L
3L
4L
5L
6L
7L
0L
1L
2L
3L
4L
5L
6L
7L
8L
9L
L
L
L
L
and
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
Top View
7C132
7C142
DIP
CY7C146
408-943-2600
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
V
CE
R/W
A
OE
A
A
A
A
A
A
A
A
A
A
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
BUSY
CC
10R
0R
1R
2R
3R
4R
5R
6R
7R
8R
9R
R
R
7R
6R
5R
4R
3R
2R
1R
0R
R
R
are
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Related parts for CY7C132-30PC

CY7C132-30PC Summary of contents

Page 1

... ONLY R/W L [2] INT L Notes: 1. CY7C132/CY7C136 (Master): BUSY is open drain output and requires pull-up resistor. CY7C142/CY7C146 (Slave): BUSY is input. 2. Open drain outputs; pull-up resistor required. Cypress Semiconductor Corporation Document #: 38-06031 Rev Dual-Port Static RAM Functional Description The CY7C132/CY7C136/CY7C142 high-speed CMOS dual-port static RAMs ...

Page 2

... CY7C132/CY7C136 CY7C142/CY7C146 PQFP Top View 7C136 ...

Page 3

... Mil [8] Test Conditions T = 25° MHz 5.0V CC and using AC Test Waveforms input levels of GND to 3V. rc CY7C132/CY7C136 CY7C142/CY7C146 Ambient Temperature V CC 0°C to +70°C 5V ± 10% –40°C to +85–C 5V ± 10% –55°C to +125°C 5V ± 10% [3] 7C132-30 7C132-35,45 7C132-55 ...

Page 4

... HZCE LZCE HZOE = 5pF Test Loads. Transition is measured ±500 mV from steady-state voltage. L CY7C132/CY7C136 CY7C142/CY7C146 5V 281Ω BUSY OR INT 30 pF BUSY Output Load (CY7C132/CY7C136 Only) 90% 10% < [5, 10] [3] 7C132-30 7C136-25 7C136-30 7C142-25 7C142-30 7C146-25 7C146-30 Max. Min. Max. ...

Page 5

... Min. Max. Min [9] 35 CY7C132/CY7C136 CY7C142/CY7C146 [5, 10] [3] 7C132-30 7C136-25 7C136-30 7C142-25 7C142-30 7C146-25 7C146-30 Max. Min. Max. Unit ...

Page 6

... Note 17 Note [15] 25 [15] 25 [15] 25 CY7C132/CY7C136 CY7C142/CY7C146 [5, 10] 7C132-55 7C136-55 7C142-55 7C146-55 Max. Min. Max. Unit ...

Page 7

... DATA OUT PREVIOUS DATA VALID [19, 21] Read Cycle No. 2 (Either Port-CE/OE LZOE t LZCE DATA OUT Read Cycle No. 3 (Read with BUSY Master: CY7C132 and CY7C136) ADDRESS R R INR t PS ADDRESS L BUSY L DOUT L Notes: 19. R/W is HIGH for read cycle. ...

Page 8

... WC t SCE PWE t SD DATA VALID HIGH IMPEDANCE [14, 23 SCE PWE t SD DATA VALID t HZWE HIGH IMPEDANCE PWE HZWE . SD CY7C132/CY7C136 CY7C142/CY7C146 LZWE to allow the data I/O pins to enter high impedance SD Page [+] Feedback ...

Page 9

... Right Address Valid First ADDRESS ADDRESS MATCH ADDRESS L BUSY L Document #: 38-06031 Rev. *C ADDRESS MATCH BLC BHC ADDRESS MATCH BLC BHC ADDRESS MISMATCH t t BLA BHA ADDRESS MISMATCH t t BLA BHA CY7C132/CY7C136 CY7C142/CY7C146 Page [+] Feedback ...

Page 10

... INT R Right Side Sets INT : L ADDRESS R t INS INT L Document #: 38-06031 Rev PWE WRITE 7FF EINS t WINS READ 7FF INR t EINR t OINR t WC WRITE 7FE EINS t WINS CY7C132/CY7C136 CY7C142/CY7C146 t RC Page [+] Feedback ...

Page 11

... AMBIENT TEMPERATURE (°C) TYPICAL ACCESS TIME CHANGE vs. OUTPUT LOADING 1.25 30.0 25.0 1.0 20.0 15.0 0.75 10 4. 25° 200 400 600 800 1000 CAPACITANCE (pF) CY7C132/CY7C136 CY7C142/CY7C146 OUTPUT SOURCE CURRENT vs. OUTPUT VOLTAGE 25° 1.0 2.0 3.0 4.0 OUTPUT VOLTAGE (V) OUTPUT SINK CURRENT vs. OUTPUT VOLTAGE 25° 0.0 1.0 2 ...

Page 12

... Ordering Information Speed (ns) Ordering Code 30 CY7C132-30PC CY7C132-30PI 35 CY7C132-35PC CY7C132-35PI CY7C132-35DMB 45 CY7C132-45PC CY7C132-45PI CY7C132-45DMB 55 CY7C132-55PC CY7C132-55PI CY7C132-55DMB 15 CY7C136-15JC CY7C136-15NC 25 CY7C136-25JC CY7C136-25JXC CY7C136-25NC CY7C136-25NXC 30 CY7C136-30JC CY7C136-30NC CY7C136-30JI 35 CY7C136-35JC CY7C136-35NC CY7C136-35JI CY7C136-35LMB 45 CY7C136-45JC CY7C136-45NC CY7C136-45JI CY7C136-45LMB 55 CY7C136-55JC CY7C136-55JXC CY7C136-55NC CY7C136-55NXC CY7C136-55JI CY7C136-55JXI CY7C136-55NI CY7C136-55NXI ...

Page 13

... Leadless Chip Carrier J69 52-Lead Plastic Leaded Chip Carrier J69 52-Lead Pb-Free Plastic Leaded Chip Carrier N52 52-Pin Plastic Quad Flatpack J69 52-Lead Plastic Leaded Chip Carrier L69 52-Square Leadless Chip Carrier CY7C132/CY7C136 CY7C142/CY7C146 Operating Range Commercial Industrial Military Commercial Industrial Military Commercial ...

Page 14

... OINR t EINR t INR BUSY TIMING BDD Note: 24. CY7C142/CY7C146 only. CY7C132/CY7C136 CY7C142/CY7C146 Subgroups 10, 11 ...

Page 15

... Package Diagrams 52-Lead Pb-Free Plastic Leaded Chip Carrier J69 Document #: 38-06031 Rev. *C 48-Lead (600-Mil) Sidebraze DIP D26 MIL-STD-1835 D-14 Config. C 52-Lead Plastic Leaded Chip Carrier J69 CY7C132/CY7C136 CY7C142/CY7C146 51-80044-** 51-85004-*A Page [+] Feedback ...

Page 16

... Package Diagrams (continued) Document #: 38-06031 Rev. *C 52-Square Leadless Chip Carrier L69 52-Lead Plastic Quad Flatpack N52 52-Lead Pb-Free Plastic Quad Flatpack N52 CY7C132/CY7C136 CY7C142/CY7C146 51-80054-** 51-85042-** Page [+] Feedback ...

Page 17

... The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. 48-Lead (600-Mil) Molded DIP P25 CY7C132/CY7C136 CY7C142/CY7C146 51-85020-*A ...

Page 18

... Document History Page Document Title: CY7C132/CY7C136/CY7C142/CY7C146 Dual Port Static RAM Document Number: 38-06031 Orig. of REV. ECN NO. Issue Date Change ** 110171 10/21/01 SZV *A 128959 09/03/03 JFU *B 236748 See ECN YDT *C 393184 See ECN YIM Document #: 38-06031 Rev. *C Description of Change Change from Spec number: 38-06031 ...

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