CY7C4231-25AC Cypress Semiconductor Corporation., CY7C4231-25AC Datasheet
CY7C4231-25AC
Related parts for CY7C4231-25AC
CY7C4231-25AC Summary of contents
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... THREE-ST ATE OUTPUT REGISTER Cypress Semiconductor Corporation Document #: 38-06016 Rev. *C CY7C4421/4201/4211/4221 CY7C4231/4241/425164/256/512/1K/2K/4K/ Synchronous FIFOs CY7C4421/4201/4211/4221 • Pb-Free Packages Available Functional Description The CY7C42X1 are high-speed, low-power FIFO memories with clocked Read and Write interfaces. All are 9 bits wide. The CY7C42X1 are pin-compatible to IDT722X1 ...
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... When OE is LOW, the FIFO’s data outputs drive the bus to which they are connected HIGH, the FIFO’s outputs are in High-Z (high-impedance) state. CY7C4421/4201/4211/4221 CY7C4231/4241/4251 -15 -25 66 CY7C4231 CY7C4241 CY7C4251 2K × × 9 Description Page Unit MHz ICC1 8K × 9 ...
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... The contents of the offset registers can be read to the data outputs when WEN2/LD is LOW and both REN1 and REN2 are LOW. LOW-to-HIGH transitions of RCLK Read register contents to the data outputs. Writes and reads should not be preformed simultaneously on the offset registers. CY7C4421/4201/4211/4221 CY7C4231/4241/4251 0–8 Page outputs ...
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... Full Offset (LSB) Reg Default Value = 007h (MSB) (MSB) 000 0000 CY7C4421/4201/4211/4221 CY7C4231/4241/4251 512 × × Empty Offset (LSB) Reg. Empty Offset (LSB) Reg. Default Value = 007h Default Value = 007h (MSB ...
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... Empty Offset ( default value Full Offset ( default value). Document #: 38-06016 Rev. *C (256 – m), CY7C4211 (512 – m), CY7C4221 (1K – m), CY7C4231 (2K – m), CY7C4241 (4K – m), and CY7C4251 (8K – m). PAF is set HIGH by the LOW-to-HIGH transition of WCLK when the number of available memory locations is greater than m. ...
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... RCLK, i.e exclusively updated by each rising edge of RCLK. RESET (RS) 9 CY7C42X1 Read Enable 2 (REN2) Used in a Width Expansion Configuration CY7C4421/4201/4211/4221 CY7C4231/4241/4251 RESET (RS) Read CLOCK (RCLK) Read ENABLE 1 (REN1) OUTPUT ENABLE (OE) PROGRAMMABLE (PAE) EMPTY FLAG (EF) #1 CY7C42X1 EF EMPTY FLAG (EF) #2 DATA OUT (Q) ...
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... GND OUT OE > – < V < Commercial Industrial Commercial Industrial Description Test Conditions ° MHz 5.0V CC CY7C4421/4201/4211/4221 CY7C4231/4241/4251 Ambient Temperature ° ° +70 C [5] ° ° – +85 C -15 -25 Max. Min. Max. Min. 2.4 2.4 0.4 0.4 V 2 ...
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... Equivalent to: THÉ VENIN EQUIVALENT 420Ω OUTPUT -10 Min. Max. 100 2 10 4.5 4.5 3 0 [14 [14 OHZ CY7C4421/4201/4211/4221 CY7C4231/4241/4251 ALL INPUT PULSES 90% 90% 10% 10% ≤ 1.91V -15 -25 Min. Max. Min. Max. 66 ...
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... REF [16] t SKEW1 , then FF may not change state until the next WCLK rising edge. SKEW1 , then EF may not change state until the next RCLK rising edge. SKEW1 CY7C4421/4201/4211/4221 CY7C4231/4241/4251 ENH NO OPERATION NO OPERATION t WFF t REF VALID DATA t OHZ Page ...
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... RSS t RSF t RSF t RSF D Write) VALID 1 [20] t FRL t SKEW1 t REF t OLZ t OE (maximum When t < minimum specification, t CLK SKEW1 SKEW1 CY7C4421/4201/4211/4221 CY7C4231/4241/4251 t RSR t RSR t RSR [21 (maximum) = either 2*t FRL [19 CLK SKEW1 ...
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... ENS ENH t RCLK t SKEW1 EF REN1, REN2 LOW OE DATA IN OUTPUT REGISTER Q – Document #: 38-06016 Rev. *C [20] FRL t t REF REF t A CY7C4421/4201/4211/4221 CY7C4231/4241/4251 t DS DATAWRITE2 t ENH t ENS t t ENS ENH [20] t FRL t t SKEW1 DATA Read REF Page ...
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... A DATA Read t CLKL t t ENS ENH t t Note ENS ENH 23 [22] t PAE , then PAE may not change state until the next RCLK. CY7C4421/4201/4211/4221 CY7C4231/4241/4251 NO Write [15] t SKEW1 t t WFF WFF t ENH t ENS t A NEXT DATA Read WORDS Note INFIFO 24 ...
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... If a Write is performed on this rising edge of the Write clock, there will be Full – (m – 1) words of the FIFO when PAF goes LOW. 26. PAF offset = m. 27. 64-m words for CY7C4421, 256 – m words in FIFO for CY7C4201, 512 – m words for CY7C4211, 1024 – m words for CY7C4221, 2048 – m words for CY7C4231, 4096 – m words for CY7C4241, 8192 – m words for CY7C4251. ...
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... Switching Waveforms (continued) Read Programmable Registers t CLK t CLKH RCLK t ENS WEN2/LD t ENS REN1, REN2 Q – Document #: 38-06016 Rev. *C CY7C4421/4201/4211/4221 t CLKL t ENH t A UNKNOWN PAE OFFSET LSB CY7C4231/4241/4251 PAF OFFSET MSB PAF OFFSET PAE OFFSET MSB LSB Page ...
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... V = 5.0V CC 1.25 1.00 0.75 0.50 − AMBIENT TEMPERATURE (°C) OUTPUT SINK CURRENT vs. OUTPUT VOLTAGE 160 140 120 100 OUTPUT VOLTAGE (V) CY7C4421/4201/4211/4221 CY7C4231/4241/4251 NORMALIZED SUPPLY CURRENT vs. FREQUENCY 1. 5. 25°C 1. 3.0V IN 0.90 0.80 0.70 0.60 125 FREQUENCY (MHz) TYPICAL t CHANGE vs. A OUTPUT LOADING 40 25 ...
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... A32 32-lead Pb-Free Thin Quad Flatpack J65 32-lead Plastic Leaded Chip Carrier J65 32-lead Pb-Free Plastic Leaded Chip Carrier A32 32-lead Thin Quad Flatpack J65 32-lead Plastic Leaded Chip Carrier CY7C4231/4241/4251 Operating Range Commercial Commercial Operating Range Commercial Commercial Commercial Industrial ...
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... Synchronous FIFO Speed (ns) Ordering Code 10 CY7C4231-10AC CY7C4231-10JC 15 CY7C4231-15AC CY7C4231-15AXC CY7C4231-15JC CY7C4231-15JXC 25 CY7C4231-25AC CY7C4231-25JC Synchronous FIFO Speed (ns) Ordering Code 10 CY7C4241-10AC CY7C4241-10AXC CY7C4241-10JC CY7C4241-10JI 15 CY7C4241-15AC CY7C4241-15AXC CY7C4241-15JC CY7C4241-15JXC 25 CY7C4241-25AC CY7C4241-25JC CY7C4241-25JI Synchronous FIFO Speed (ns) Ordering Code 10 CY7C4251-10AC CY7C4251-10JC CY7C4251-10JXC CY7C4251-10AI ...
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... The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. 32-Lead Plastic Leaded Chip Carrier J65 CY7C4421/4201/4211/4221 CY7C4231/4241/4251 51-85063-*B 51-85002-*B Page ...
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... Document Title: CY7C4421/4201/4211/4221, CY7C4231/4241/4251 64/256/512/1K/2K/4K/ Synchronous FIFOs Document Number: 38-06016 Issue REV. ECN NO. Date ** 106477 09/10/01 *A 110725 03/20/02 *B 122268 12/26/02 *C 386306 See ECN Document #: 38-06016 Rev. *C Orig. of Change SZV Change from Spec number: 38-00419 to 38-06016 FSG Change Input Leakage current I RBI Power up requirements added to Maximum Ratings Information ...