UPD78P058FGC-8BT Renesas Electronics Corporation., UPD78P058FGC-8BT Datasheet

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UPD78P058FGC-8BT

Manufacturer Part Number
UPD78P058FGC-8BT
Description
Manufacturer
Renesas Electronics Corporation.
Datasheet

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Document No. U11796EJ2V0DS00 (2nd edition)
Date Published September 1997 N
Printed in Japan
DESCRIPTION
of the PD78058F is replaced with one-time programmable (OTP) ROM.
of many different products, and for rapid development and time-to-market of new products.
FEATURES
• EMI noise reduction version (overall peak level reduced by 5 to 10 dB)
• Pin compatible with mask ROM versions (except the V
• Internal PROM : 60 Kbytes
• Internal high-speed RAM : 1024 bytes
• Internal expansion RAM : 1024 bytes
• Buffer RAM : 32 bytes
• Operable in the same supply voltage range as mask ROM versions (V
• One of the QTOP
Notes 1. The internal PROM capacity can be changed with the memory size switching register (IMS).
Remarks 1. For the difference between PROM and mask ROM versions, see 1. DIFFERENCES BETWEEN
The PD78P058F is an Electro Magnetic Interference (EMI) noise reduction version of the PD78P058.
The PD78P058F is a member of the PD78058F Subseries of the 78K/0 Series, in which the on-chip mask ROM
Because this device can be programmed by users, it is suited for applications involving the small-scale production
Details are given in the following User’s Manuals. Be sure to read them before starting design.
Programmable once only (ideal for small-scale production)
2. The internal expansion RAM capacity can be changed with the internal expansion RAM size switching
78K/0 Series User’s Manual Instructions
PD78058F, 78058FY Subseries User’s Manual : U12068E
register (IXS).
2. QTOP Microcontroller is the general name of the microcontrollers with on-chip one-time PROM that are
totally supported by the NEC writing service (from writing to marking, screening and testing).
PD78P058F AND MASK ROM VERSIONS.
TM
Microcontrollers
8-BIT SINGLE-CHIP MICROCONTROLLER
The information in this document is subject to change without notice.
Note 1
The mark
Note 2
DATA SHEET
shows major revised points.
PP
pin)
: U12326E
MOS INTEGRATED CIRCUIT
DD
= 2.7 to 6.0 V)
PD78P058F
©
1996

Related parts for UPD78P058FGC-8BT

UPD78P058FGC-8BT Summary of contents

Page 1

SINGLE-CHIP MICROCONTROLLER DESCRIPTION The PD78P058F is an Electro Magnetic Interference (EMI) noise reduction version of the PD78P058. The PD78P058F is a member of the PD78058F Subseries of the 78K/0 Series, in which the on-chip mask ROM of the PD78058F ...

Page 2

ORDERING INFORMATION Part Number PD78P058FGC-3B9 80-pin plastic QFP (14 PD78P058FGC-8BT 80-pin plastic QFP (14 Caution The PD78P058FGC contains two types of packages (see 8. PACKAGE DRAWINGS). For the packages which can be supplied, consult your local NEC sales representative. 2 ...

Page 3

SERIES PRODUCT DEVELOPMENT These products are a further development in the 78K/0 Series. The designations appearing inside the boxes are subseries names. Control PD78075BY PD78075B 100-pin PD78078Y 100-pin PD78078 100-pin PD78070A PD78070AY 100-pin PD780018AY 80-pin PD780058 PD780058Y 80-pin PD78058F ...

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The major functional differences among the subseries are shown below. Function ROM Capacity 8-bit 16-bit Watch WDT A/D Subseries Name Control PD78075B 4ch PD78078 PD78070A – PD780058 ...

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FUNCTION DESCRIPTION Item Internal memory Memory space General register Minimum instruction execution time When main system clock is selected When subsystem clock is selected Instruction set I/O port A/D converter D/A converter Serial interface Timer Timer output Clock output Buzzer ...

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PIN CONFIGURATIONS (Top View) (1) Normal operating mode • 80-pin plastic QFP (14 14 mm, Resin thickness: 2.7 mm) PD78P058FGC-3B9 • 80-pin plastic QFP (14 14 mm, Resin thickness: 1.4 mm) PD78P058FGC-8BT ...

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A8 to A15 : Address Bus AD0 to AD7 : Address/Data Bus ANI0 to ANI7 : Analog Input ANO0, ANO1 : Analog Output ASCK : Asynchronous Serial Clock ASTB : Address Strobe AV : Analog Power Supply ...

Page 8

PROM programming mode • 80-pin plastic QFP (14 14 mm, Resin thickness: 2.7 mm) PD78P058FGC-3B9 • 80-pin plastic QFP (14 14 mm, Resin thickness: 1.4 mm) PD78P058FGC-8BT ...

Page 9

BLOCK DIAGRAM TO0/P30 16-bit TIMER/ TI00/INTP0/P00 EVENT COUNTER TI01/INTP1/P01 TO1/P31 8-bit TIMER/ EVENT COUNTER 1 TI1/P33 TO2/P32 8-bit TIMER/ EVENT COUNTER 2 TI2/P34 WATCHDOG TIMER WATCH TIMER SI0/SB0/P25 SERiAL SO0/SB1/P26 INTERFACE 0 SCK0/P27 SI1/P20 SO1/P21 SERIAL SCK1/P22 INTERFACE 1 STB/P23 ...

Page 10

DIFFERENCES BETWEEN PD78P058F AND MASK ROM VERSIONS ..................................... 11 2. PIN FUNCTIONS ................................................................................................................................ 12 2.1 Pins in Normal Operating Mode ............................................................................................................ 12 2.2 Pins in PROM Programming Mode ....................................................................................................... 16 2.3 Pin Input/Output Circuits and Recommended Connection of Unused ...

Page 11

DIFFERENCES BETWEEN PD78P058F AND MASK ROM VERSIONS The PD78P058F is a single-chip microcontroller with an on-chip one-time PROM. Setting the memory size switching register (IMS) and internal expansion RAM size switching register (IXS) enables identical functions to mask ROM ...

Page 12

PIN FUNCTIONS 2.1 Pins in Normal Operating Mode (1) Port pins (1/2) Pin Name Input/Output P00 Input Port 0 8-bit input/output P01 Input/output port P02 P03 P04 P05 P06 P07 Note 1 Input P10 to P17 Input/output Port 1 ...

Page 13

Port pins (2/2) Pin Name Input/Output P40 to P47 Input/output Port 4 8-bit input/output port Input/output is specifiable as 8-bit unit. When used as the input port possible to use an on-chip pull-up resistor by software. Set ...

Page 14

Non-port pins (1/2) Pin Name Input/Output INTP0 Input External interrupt request inputs, with specifiable valid edges (rising edge, falling edge, and both INTP1 rising and falling edges) INTP2 INTP3 INTP4 INTP5 INTP6 SI0 Input Serial data input of the ...

Page 15

Non-port pins (2/2) Pin Name Input/Output PCL Output Clock output (for trimming main system clock and subsystem clock) BUZ Output Buzzer output RTP0 to RTP7 Output Real-time output port which outputs data in syn- chronization with trigger AD0 to ...

Page 16

Pins in PROM Programming Mode Pin Name Input/Output RESET Input PROM programming mode setting When + +12 applied to the V RESET pin, this chip is set in the PROM programming mode. V Input PROM ...

Page 17

Pin Input/Output Circuits and Recommended Connection of Unused Pins Types of input/output circuits of the pins and recommended connection of unused pins are shown in Table 2-1. For the configuration of each type of input/output circuit, see Figure 2-1. ...

Page 18

Table 2-1. Pin Input/Output Circuit Type (2/2) Input/Output Pin Name Circuit Type P50/A8 to P57/A15 P60 to P63 P64/RD P65/WR P66/WAIT P67/ASTB P70/SI2/RxD P71/SO2/TxD P72/SCK2/ASCK P120/RTP0 to P127/RTP7 P130/ANO0, P131/ANO1 RESET XT2 AV REF0 AV REF1 ...

Page 19

Figure 2-1. Pin Input/Output Circuits (1/2) Type 2 IN Schmitt-Triggered Input with Hysteresis Characteristic Type 5 pullup P-ch enable AV DD data P-ch output N-ch disable AV SS input enable Type 5 pullup P-ch enable AV ...

Page 20

Figure 2-1. Pin Input/Output Circuits (2/2) Type 12-B pullup enable AV data P-ch output N-ch disable AV SS input enable Analog P-ch Output Voltage N-ch AV Type 13-H data output disable Middle-High Voltage Input Buffer 20 Type ...

Page 21

MEMORY SIZE SWITCHING REGISTER (IMS) This is a register to disable use of part of internal memories by software. By setting this memory size switching register (IMS possible to get the same memory mapping as that of ...

Page 22

INTERNAL EXPANSION RAM SIZE SWITCHING REGISTER (IXS) This is a register to set the internal expansion RAM capacity by software. By setting this internal expansion RAM size switching register (IXS possible to get the same memory mapping ...

Page 23

PROM PROGRAMMING The PD78P058F has an on-chip 60-Kbyte PROM as a program memory. For programming, set the PROM programming mode by the V and RESET pins. For connecting unused pins, refer to PIN CONFIGURATIONS (Top PP View) (2) PROM ...

Page 24

Read mode Read mode is set are set. (2) Output disable mode Data output becomes high-impedance, and is in the output disable mode set. Therefore, it allows ...

Page 25

PROM Write Procedure Figure 5-1. Page Program Mode Flowchart Address = Address + 1 No Pass Remark G = Start address N = Program last address Start Address = 6 12 ...

Page 26

Figure 5-2. Page Program Mode Timing Page Data Latch A2 to A16 A0 Data Input 1 ...

Page 27

Figure 5-3. Byte Program Mode Flowchart V Address = Address + Pass Remark G = Start address N = Program last address Start Address = ...

Page 28

Figure 5-4. Byte Program Mode Timing A0 to A16 Data Input 1 PGM ...

Page 29

PROM Read Procedure The contents of PROM are readable to the external data bus (D0 to D7) according to the read procedure shown below. (1) Fix the RESET pin at low level, supply + the V PIN ...

Page 30

SCREENING OF ONE-TIME PROM VERSIONS The one-time PROM version ( PD78P058FGC-3B9, 78P058FGC-8BT) cannot be tested completely by NEC before it is shipped, because of its structure recommended to perform screening to verify PROM after writing necessary data ...

Page 31

ELECTRICAL SPECIFICATIONS Absolute Maximum Ratings ( Parameter Symbol Supply voltage REF0 AV REF1 AV SS Input voltage V P00 to P07, P10 to P17, P20 to P27, I1 ...

Page 32

Main System Clock Oscillator Characteristics (T Recommended Resonator Circuit Ceramic resonator Oscillation frequency Oscillation stabilization time Crystal resonator Oscillation frequency Oscillation stabilization time External clock X1 ...

Page 33

Subsystem Clock Oscillator Characteristics (T Recommended Resonator Circuit Crystal resonator Oscillation frequency V XT2 XT1 Oscillation stabilization time External clock XT1 input frequency XT1 XT2 (f XT1 input high-/low-level width (t Notes 1. Only the ...

Page 34

Capacitance ( Parameter Symbol Input capacitance MHz, Unmeasured pins returned Input/output MHz IO capacitance Unmeasured pins ...

Page 35

DC Characteristics (T = – Parameter Symbol Input voltage, high V P10 to P17, P21, P23, P30 to P32, P35 to P37, P40 to P47, 0.7 V IH1 P50 to P57, P64 to P67, P71, ...

Page 36

DC Characteristics (T = – Parameter Symbol Input leakage LIL1 IN current, low I LIL2 I LIL3 Output leakage LOH OUT current, high Output leakage I ...

Page 37

DC Characteristics (T = – Parameter Symbol Supply current Note 1 I 5.0-MHz crystal oscillation operating DD1 mode (f XX 5.0-MHz crystal oscillation operating mode ( 5.0-MHz crystal oscillation HALT DD2 mode (f ...

Page 38

AC Characteristics (1) Basic Operation (T = – Parameter Symbol Cycle time T Operating on CY (minimum instruction main system clock execution time) Operating on subsystem clock TI00 input 4.5 to ...

Page 39

(Main System Clock Guaranteed Operation Range 2.0 1.0 0.5 0 Supply Voltage V [ (Main System Clock, ...

Page 40

Read/Write Operations (a) When MCS = 1, PCC2 to PCC0 = 000B (T Parameter ASTB high-level width Address setup time Address hold time Data input time from address Data input time from RD Read data hold time RD low-level ...

Page 41

Except when MCS = 1, PCC2 to PCC0 = 000B (T Parameter ASTB high-level width Address setup time Address hold time Data input time from address Data input time from RD Read data hold time RD low-level width WAIT ...

Page 42

Serial Interface (T = – (a) Serial interface channel 0 (i) 3-wire serial I/O mode (SCK0 ... internal clock output) Parameter Symbol SCK0 cycle time t KCY1 SCK0 high-/low-level width t KH1 t KL1 ...

Page 43

SBI mode (SCK0 ... internal clock output) Parameter Symbol SCK0 cycle time t KCY3 SCK0 high-/low-level width t KH3 t KL3 SB0, SB1 setup time (to SCK0 ) t SIK3 SB0, SB1 hold time (from SCK0 ) t KSI3 ...

Page 44

I/O mode (SCK0 ... internal clock output) Parameter Symbol SCK0 cycle time t KCY5 SCK0 high-level width t KH5 SCK0 low-level width t KL5 SB0, SB1 setup time (to SCK0 ) t SIK5 SB0, SB1 hold time ...

Page 45

Serial interface channel 1 (i) 3-wire serial I/O mode (SCK1 ... internal clock output) Parameter Symbol SCK1 cycle time t KCY7 SCK1 high-/low-level width t KH7 t KL7 SI1 setup time (to SCK1 ) t SIK7 SI1 hold time ...

Page 46

Automatic transmission/reception function 3-wire serial I/O mode (SCK1 ... internal clock output) Parameter Symbol SCK1 cycle time t KCY9 SCK1 high-/low-level width t KH9 t KL9 SI1 setup time (to SCK1 ) t SIK9 SI1 hold time (from SCK1 ...

Page 47

Serial interface channel 2 (i) 3-wire serial I/O mode (SCK2 ... internal clock output) Parameter Symbol SCK2 cycle time t KCY11 SCK2 high-/low-level width t KH11 t KL11 SI2 setup time (to SCK2 ) t SIK11 SI2 hold time ...

Page 48

AC Timing Test Point (Excluding X1, XT1 Inputs) 0.8 V 0.2 V Clock Timing X1 Input XT1 Input TI Timing TI00, TI01 TI1, TI2 48 0 Test Points 0 1 1/f ...

Page 49

Read/Write Operations External fetch (no wait A15 Low-Order 8-Bit Address AD0 to AD7 t ADS ASTB RD External fetch (wait insertion A15 Low-Order 8-Bit Address AD0 to AD7 t t ADS ADH t ASTH ASTB RD ...

Page 50

External data access (no wait A15 Low-Order 8-Bit Address AD0 to AD7 t ADS t ADH t ASTH ASTB RD t ASTRD WR External data access (wait insertion): Low-Order 8-Bit Address A8 to A15 AD0 to AD7 t ...

Page 51

Serial Transfer Timing 3-wire serial I/O mode: SCK0 to SCK2 SI0 to SI2 SO0 to SO2 Remark SBI mode (bus release signal transfer): SCK0 t t KSB SBL SB0, ...

Page 52

I/O mode: SCK0 SB0, SB1 Automatic transmission/reception function 3-wire serial I/O mode: SO1 D2 D1 SI1 SIK9 KH9 KSO9, 10 SCK1 t R10 t KL9 KCY9, 10 STB ...

Page 53

UART mode (external clock input): ASCK t KCY12 t t KL12 KH12 t R12 PD78P058F t F12 53 ...

Page 54

A/D Converter Characteristics (T = – Parameter Symbol Resolution Note Total error 2.7 V Conversion time t CONV Sampling time t SAMP Analog input voltage V IAN Reference voltage AV REF0 resistance ...

Page 55

Data Memory STOP Mode Low Supply Voltage Data Retention Characteristics (T Parameter Symbol Data retention V DDDR supply voltage Data retention I V DDDR supply current Subsystem clock stopped, feedback resistor disconnected Release signal setup t SREL time Oscillation t ...

Page 56

Interrupt Input Timing INTP0 to INTP6 RESET Input Timing RESET INTL INTH t RSL PD78P058F ...

Page 57

PROM PROGRAMMING CHARACTERISTICS DC Characteristics (1) PROM Write Mode ( Parameter Symbol Symbol Input voltage, high V IH Input voltage, low V IL Output voltage, high Output voltage, low V OL ...

Page 58

AC Characteristics (1) PROM Write Mode (a) Page program mode ( Parameter Symbol Address setup time ( setting time CE setup time ( Input data setup time (to OE ...

Page 59

PROM Read Mode ( Parameter Symbol Data output delay time from address Data output delay time from CE Data output delay time from OE Data output float delay time from OE Data hold ...

Page 60

PROM Write Mode Timing (page program mode) Page Data Latch A2 to A16 AHL A0 Hi Data Input t VPS VDS V ...

Page 61

PROM Write Mode Timing (byte program mode A16 t AS Hi-Z Page Data Latch VPS V +1 VDS V IH ...

Page 62

PROM Programming Mode Setting Timing RESET A16 62 t SMA Effective Address PD78P058F ...

Page 63

PACKAGE DRAWINGS Package Drawing of PD78P058FGC-3B9 80 PIN PLASTIC QFP (14 14 NOTE Each lead centerline is located within 0.13 mm (0.005 inch) of its true position (T.P.) at maximum material condition. ...

Page 64

Package Drawing of PD78P058FGC-8BT 80 PIN PLASTIC QFP (14 14 NOTE Each lead centerline is located within 0.13 mm (0.005 inch) of its true position (T.P.) at maximum material condition ...

Page 65

RECOMMENDED SOLDERING CONDITIONS The PD78P058F should be soldered and mounted under the conditions recommended below. For details of recommended soldering conditions, refer to the information document Semiconductor Device Mounting Technology Manual (C10535E). For soldering methods and conditions other than ...

Page 66

Table 9-1. Surface Mount Type Soldering Conditions (2/2) (2) PD78P058FGC-8BT : 80-pin plastic QFP (14 Soldering Method Package peak temperature: 235 C, Reflow time: 30 seconds or below (210 C or Infrared reflow higher), Number of reflow processes: 2 max., ...

Page 67

APPENDIX A. DEVELOPMENT TOOLS The following support tools are available for system development using the PD78P058F. Language Processing Software Notes RA78K/0 78K/0 Series common assembler package Notes CC78K/0 78K/0 Series common C ...

Page 68

Real-Time OS Notes RX78K/0 78K/0 Series real-time OS MX78K0 Notes 78K/0 Series OS Fuzzy Inference Development Support System Note 1 Note 6 FE9000 /FE9200 Fuzzy knowledge data input tool FT9080 Note 1 ...

Page 69

Drawing of Conversion Socket (EV-9200GC-80) and Recommended Footprint Figure A-1. Drawing of EV-9200GC-80 (for Reference only EV-9200GC-80 1 No.1 pin index EV-9200GC-80-G1E ITEM MILLIMETERS INCHES A 18.0 0.709 B ...

Page 70

Figure A-2. Recommended Footprint of EV-9200GC-80 (for Reference only) ITEM MILLIMETERS 0.65 0.02 19=12.35 0.05 D 0.65 0.02 19=12.35 0. Dimensions of mount pad for EV-9200 and that for ...

Page 71

APPENDIX B. RELATED DOCUMENTS Device Documents Document Name PD78058F, 78058FY Subseries User’s Manual PD78P058F Data Sheet PD78056F, 78058F Data Sheet 78K/0 Series User’s Manual Instructions 78K/0 Series Instruction Set 78K/0 Series Instruction Table Caution The contents of the above documents ...

Page 72

Development Tool Documents (User's Manual) Document Name RA78K Series Assembler Package RA78K Series Structured Assembler Preprocessor RA78K0 Assembler Package CC78K Series C Compiler CC78K0 C Compiler CC78K/0 C Compiler Application Note CC78K Series Library Source File PG-1500 PROM Programmer PG-1500 ...

Page 73

Embedded Software Documents (User's Manual) Document Name 78K/0 Series Real-time OS 78K/0 Series OS MX78K0 Fuzzy Knowledge Data Input Tools 78K/0, 78K/II, 87AD Series Fuzzy Inference Development Support System Translator 78K/0 Series Fuzzy Inference Development Support System Fuzzy Inference Module ...

Page 74

NOTES FOR CMOS DEVICES 1 PRECAUTION AGAINST ESD FOR SEMICONDUCTORS Note: Strong electric field, when exposed to a MOS device, can cause destruction of the gate oxide and ultimately degrade the device operation. Steps must be taken to stop generation ...

Page 75

Regional Information Some information contained in this document may vary from country to country. Before using any NEC product in your application, please contact the NEC office in your country to obtain a list of authorized representatives and distributors. They ...

Page 76

FIP, IEBus, and QTOP are trademarks of NEC Corporation. MS-DOS and Windows are either registered trademarks or trademarks of Microsoft Corporation in the United States and/or other countries. IBM DOS, PC/AT, and PC DOS are trademarks of International Business Machines ...

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