LPC47N227 Standard Microsystems, LPC47N227 Datasheet
LPC47N227
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LPC47N227 Summary of contents
Page 1
... FIFO, two 16C550 compatible UARTs, one Multi-Mode parallel port with ChiProtect circuitry plus EPP and ECP support and one floppy direct drive support. The LPC47N227 does not require any external filter components, is easy to use and offers lower system cost and reduced board area. The LPC47N227 is software and register compatible with SMSC’ ...
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... The LPC47N227 supports both 1Mbps and 2Mbps data rates and vertical recording operation at 1Mbps Data Rate. The LPC47N227 also features a full 16-bit internally decoded address bus, a Serial IRQ interface with PCI nCLKRUN support, relocatable configuration ports and three DMA channel options. Both on-chip UARTs are compatible with the NS16C550 ...
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... LPC BUS LAD3 INTERFACE nLFRAME nLDRQ nPCI_RESET nLPCPD nCLKRUN CLOCK GEN CLOCKI V Vcc Vss TR SMSC DB – LPC47N227 100 Pin Super I/O with LPC Interface for Notebook Applications BLOCK DIAGRAM nIO_PME CONTROL, ADDRESS, DATA ACPI CONFIGURATION BLOCK REGISTERS WDATA SMSC DIGITAL PROPRIETARY WCLOCK ...
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... PRODUCT PREVIEW REMARK Overall Package Height Standoff Body Thickness X Span X body Size Y Span Y body Size Lead Frame Thickness Lead Length Lead Pitch Lead Foot Angle Lead Width Lead Shoulder Radius Lead Foot Radius Coplanarity (Assemblers) Coplanarity (Test House) SMSC DB – LPC47N227 ...
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... Details of pin 1 identifier are optional but must be located within the zone indicated. 4 Dimension for foot length L measured at the gauge plane 0.25 mm above the seating plane. 5 Shoulder widths must conform to JEDEC MS-026 dimension ' minimum of 0.20mm. SMSC DB – LPC47N227 100 Pin Super I/O with LPC Interface for Notebook Applications MAX 1.60 0.15 1 ...