CDP1879CE1 Intersil Corporation, CDP1879CE1 Datasheet
CDP1879CE1
Related parts for CDP1879CE1
CDP1879CE1 Summary of contents
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... DB1 Interrupt 13 DB0 © Intersil Corporation 1999 4-104 CDP1879, CDP1879C-1 CMOS Real-Time Clock ). TEMP RANGE 5V 10V o - CDP1879CE1 CDP1879E CDP1879CD1 - o +85 C CDP1879CD1X - FUNCTION 1. Seconds, minutes, hours, date and month counters 2. Status register to identify interrupt source 1. Control register to set device operation 2 ...
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Absolute Maximum Ratings DC Supply Voltage Range (Voltage referenced to V Terminal) SS CDP1879 . . . . . . . . . . . . . . . . . . . . . . . . ...
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XTAL OSCILLATOR PRESCALE XTAL PRESCALE SELECT CONTROL REGISTER CLOCK OUT INT CLOCK AND INT. LOGIC RESET INT. STATUS REGISTER I/O INTERFACE DB0-DB7 TPA ADDRESS DECODE I-O MEM AND TPB/WR CONTROL LOGIC RD CS ...
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Static Electrical Specifications at T PARAMETER Ouiescent Device Current I DD Output Low Drive (Sink) Current, Data Bus and INT l OL Output High Drive (Source) Current, Data Bus and INT I OH Output Low Drive (Sink) Current, Clock Out ...
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Static Electrical Specifications at T PARAMETER Input Capacitance C IN Output Capacitance C OUT Maximum Clock Rise and Fall Times NOTES Typical values are for and nominal V A ...
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ADDRESS ...
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FREEZE CIRCUIT XTAL OSCILLATOR PRESCALE XTAL PRESCALE CLOCK SELECT SELECT CONTROL REGISTER CLOCK OUT INT CLOCK AND INT. LOGIC RESET INT. STATUS REGISTER I/O INTERFACE DB0-DB7 TPA ADDRESS DECODE IO/MEM AND TPB/WR CONTROL ...
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XTAL OSCILLATOR PRESCALE XTAL PRESCALE SELECT CLOCK OUT INT CLOCK AND INT. LOGIC RESET INT. STATUS REGISTER I/O INTERFACE DB0-DB7 TPA ADDRESS DECODE IO/MEM AND TPB/WR CONTROL LOGIC RD CS POWER DOWN FIGURE ...
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The seconds counter divide the pulse by 60 and its output clocks the minute counter every 60 seconds Further division by the minutes, hours, day of month and month counters result ...
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The interrupt status register has the same address as the control register. Addressing the interrupt sta- tus register with the RD line active will place these register bits ...
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In memory mapping any dummy write operation after selecting address “1” will set the “freeze” circuit. If using the I/O mode output instruction will perform the same function. There is no time ...
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TABLE 3. TYPICAL OSCILLATOR CIRCUIT PARAMETERS FOR SUGGESTED OSCILLATOR CIRCUIT, SEE FIGURE 6 PARAMETER 4.197MHz Crystal Impedance 73 NOTE: CDP1879C-1 only. Design Considerations for Stable ...
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STANDBY (TIMEKEEPING) CHARACTERISTICS AT FULL TEMPERATURE RANGE PARAMETER Chip Deselect to Standby t CSTBY (Timekeeping) Voltage Time Recovery to Normal t RC Operation Time STANDBY VOLTAGE MODE 0. STBY t R (NOTE 1) ...
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CDP1879, CDP1879C XTAL XTAL 1/2 CDP1800 CD40107 1/2 CD40107 CLEAR EFI FIGURE 10. CPU WAKE-UP CIRCUIT USING THE CDP1879 REAL-TIME CLOCK CLEAR MWR MRD TPA INTERRUPT MA0 ADDRESS MA1 LINES MA2 MA7 ...
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CDP1879, CDP1879C-1 TPA ADDRESS HIGH BYTE TPB/WR DATA FROM CPU TO REAL TIME CLOCK FIGURE 12. CDP1800 SERIES MEMORY MAPPED WRITE CYCLE TIMING WAVEFORMS TPA ADDRESS HIGH BYTE ENABLED RD xxxx xxxx DATA FROM xxxx REAL TIME CLOCK xxxx TO ...
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DATA FROM MEMORY TO REAL-TIME CLOCK FIGURE 15. CDP1800 SERIES INPUT/OUTPUT MAPPING TIMING WAVEFORMS WITH OUTPUT INSTRUCTION TPB/WR N LINES DATA FROM REAL-TIME CLOCK TO MEMORY FIGURE 16. CDP1800 SERIES INPUT/OUTPUT MAPPING TIMING WAVEFORMS WITH INPUT INSTRUCTION Dynamic Electrical Specifications ...
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TPA ADDRESS/CHIP SELECT READ DATA TO CPU Dynamic Electrical Specifications PARAMETER Write Cycle Times (See Figure 18) Address Setup to Write t AS Write Pulse Width t WR Data Setup to Write t DS Address Hold after Write t AH ...
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... All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use ...