HM51W4265CLTT-6 HITACHI, HM51W4265CLTT-6 Datasheet

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HM51W4265CLTT-6

Manufacturer Part Number
HM51W4265CLTT-6
Description
Manufacturer
HITACHI
Datasheet
Description
The Hitachi HM51W4265C Series is a CMOS dynamic RAM organized as 262,144-word
HM51W4265C Series has realized higher density, higher performance and various functions by employing
0.8 m CMOS process technology and some new CMOS circuit design technologies. The HM51W4265C
Series offers Extended Data Out (EDO) Page Mode as a high speed access mode. Multiplexed address input
permits the HM51W4265C Series to be packaged in standard 400-mil 44-pin plastic TSOPII.
Features
Single 3.3 V ( 0.15 V) (HM51W4265C-6R)
Single 3.3 V ( 0.3 V) (HM51W4265C-6/7/8)
High speed
Low power dissipation
EDO page mode capability
512 refresh cycles: 8 ms
3 variations of refresh
2CAS-byte control
Battery backup operation (L-version)
Access time: 60 ns/70 ns/80 ns (max)
Active mode: 576 mW/552 mW/468 mW/396 mW (max)
Standby mode: 6.9 mW (max) (HM51W4265C-6R)
RAS-only refresh
CAS-before-RAS refresh
Self refresh
262,144-word
7.2 mW (max) (HM51W4265C-6/7/8)
0.69 mW (max)(L-version) (HM51W4265CL-6R)
0.72 mW (max) (L-version) (HM51W4265CL-6/7/8)
128 ms (L-version)
HM51W4265C Series
16-bit Dynamic Random Access Memory
ADE-203-477A (Z)
Jul. 31, 1996
Rev. 1.0
16-bit.

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HM51W4265CLTT-6 Summary of contents

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... HM51W4265C Series 262,144-word Description The Hitachi HM51W4265C Series is a CMOS dynamic RAM organized as 262,144-word HM51W4265C Series has realized higher density, higher performance and various functions by employing 0.8 m CMOS process technology and some new CMOS circuit design technologies. The HM51W4265C Series offers Extended Data Out (EDO) Page Mode as a high speed access mode. Multiplexed address input permits the HM51W4265C Series to be packaged in standard 400-mil 44-pin plastic TSOPII ...

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... HM51W4265C Series Ordering Information Type No. HM51W4265CTT-6 HM51W4265CTT-6R HM51W4265CTT-7 HM51W4265CTT-8 HM51W4265CLTT-6 HM51W4265CLTT-6R HM51W4265CLTT-7 HM51W4265CLTT-8 Pin Arrangement 2 Access time Package 60 ns 400-mil 44-pin plastic TSOPII (TTP-44/40DB HM51W4265CTT/CLTTSeries ...

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Pin Description Pin name Function Address input — Row address — Column address — Refresh address I/O0 to I/O15 Data-in/data-out RAS Row address strobe UCAS, LCAS Column address strobe WE Read/write ...

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HM51W4265C Series Block Diagram 128 k Memory Array mat I/O Bus & Column Decoder 128 k Memory Array mat 128 k Memory Array mat I/O Bus & Column Decoder 128 k Memory Array mat 128 k Memory Array mat I/O ...

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Operation Mode The HM51W4265C series has the following 11 operation modes. 1. Read cycle 2. Early write cycle 3. Delayed write cycle 4. Read-modify-write cycle 5. RAS-only refresh cycle 6. CAS-before-RAS refresh cycle 7. Self refresh cycle 8. EDO page ...

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HM51W4265C Series Notes High(inactive) L: Low(active Early write cycle WCS t < Delayed write cycle WCS 3. Mode is determined by the OR function of the UCAS and ...

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DC Characteristics ( + 3 3 Parameter 1, 2 Operating current* * Standby current Standby current ...

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HM51W4265C Series Notes depends on output load condition when the device is selected open condition. 2. Address can be changed once or less while RAS = V 3. Address can be changed once or less within ...

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AC Characteristics ( + 3 3 Test Conditions Input rise and fall time Input ...

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HM51W4265C Series Read Cycle Parameter Access time from RAS Access time from CAS Access time from address Access time from OE Read command setup time Read command hold time to CAS Read command hold time to RAS Column address to ...

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Write Cycle Parameter Write command setup time Write command hold time Write command pulse width Write command to RAS lead time Write command to CAS lead time Data-in setup time Data-in hold time Read-Modify-Write Cycle Parameter Read-modify-write cycle time RAS ...

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HM51W4265C Series EDO Page Mode Cycle Parameter EDO page mode cycle time EDO page mode CAS precharge time EDO page mode RAS pulse width Access time from CAS precharge RAS hold time from CAS precharge Output data hold time from ...

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Notes measurements assume t 2. Assumes that t RCD recommended value shown in this table Measured with a load circuit equivalent to 1 TTL loads and 50 pF Assumes that t RCD 5. Assumes ...

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HM51W4265C Series 26. t defines the time at which the output level satisfied the output timing reference levels. DOH Measured with the test conditions. 27. t (min (min RAS RWD 28. t (min (min) ...

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Notes concerning 2CAS control 1. Each of the UCAS/LCAS should satisfy the timing specifications individually. 2. Different operation mode for upper/lower byte is not allowed; such as following. RAS UCAS LCAS WE 3. Closely separated upper/lower byte control is not ...

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HM51W4265C Series 34 Timing Waveforms* Read Cycle RAS t T UCAS LCAS t ASR Row Address WE Dout Din RAS t RSH t t RCD CAS t CSH t t RAD RAL t t CAH ...

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Early Write Cycle RAS t T UCAS LCAS t ASR Row Address WE Din Dout RAS t RSH t t RCD CAS t CSH ASC CAH RAH Column t t WCH WCS t t ...

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HM51W4265C Series Delayed Write Cycle RAS t T UCAS LCAS t t ASR RAH Row Address WE Din t DZO Dout RAS t CSH t t RCD RSH t CAS t ASC t t CAH ...

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Read-Modify-Write Cycle t T RAS UCAS LCAS t ASR t Address Row WE Din High-Z Dout t DZO OE t RWC t RCD t RAD t ASC t RAH CAH Column t RCS t CWD t AWD ...

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HM51W4265C Series EDO Page Mode Read Cycle (t RAS RCD UCAS LCAS t ASR t RAD t RAH Address Row t RCS WE Din t Dout minimum cycle operation) HPC t RASC t t ...

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EDO Page Mode Read Cycle (High-Z control by WE and OE) RAS CSH UCAS t LCAS t t RCS RCHR CAH t RAH ASC ASR Address Row Column 1 t CAL t ...

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HM51W4265C Series EDO Page Mode Early Write Cycle (t RAS RCD UCAS LCAS t t ASR RAH Address Row WE Din Dout 22 minimum cycle operation) HPC t RASC t t CSH HPC CAS ...

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EDO Page Mode Delayed Write Cycle RAS RCD UCAS LCAS t ASR t t RAH Address Row t RCS WE Din Dout t ODD OE t RASC t t CSH HPC CAS CP CAS ...

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HM51W4265C Series EDO Page Mode Read-Modify-Write Cycle RAS t RCD t T UCAS t RAD LCAS t RAH t ASR t ASC Row Column Address t RCS WE t DZC High-Z Din RAC t OAC Dout t ...

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EDO Page Mode Mix Cycle (1)* RAS t t CSH T t UCAS CAS LCAS t t WCS WCH WE t ASC t t CAH t RAH ASR Address Row Column 1 t CAL Din Din ...

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HM51W4265C Series EDO Page Mode Mix Cycle (2)* RAS CSH UCAS t CAS LCAS t t RCHR RCS ASC CAH t t RAH ASR Address Row Column 1 t CAL High-Z Din OE t ...

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CAS-Before-RAS Refresh Cycle t RP RAS t RPC t CPN UCAS LCAS Address t OFF1 Dout RAS RPC CSR CHR CPN High-Z HM51W4265C Series ...

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HM51W4265C Series RAS-Only Refresh Cycle RAS UCAS LCAS t Address Dout RAS CRP t RAH ASR Row High RPC CRP ...

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Self Refresh Cycle* t RAS t RPC t CPN UCAS LCAS Address t OFF1 Dout t RASS CSR High-Z HM51W4265C Series t RPS t CRP t CHS 29 ...

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HM51W4265C Series Package Dimensions HM51W4265CTT/CLTT Series (TTP-44/40DB 0.27 ± 0.07 30 18.41 18.81 Max 0.80 0.13 M 1.15 Max 0.10 11.76 ± 0.2 0 – 5° 0.50 ± 0.10 Unit: mm ...

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... All rights are reserved: No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without Hitachi’s permission. 3. Hitachi will not be held responsible for any damage to the user that may result from accidents or any other reasons during operation of the user’s unit according to this document. ...

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HM51W4265C Series Revision Record Rev. Date Contents of Modification 0.0 Dec. 1, 1995 Initial issue 1.0 Jul. 31, 1996 Addition of HM51W4265C-6 Series AC Characteristics Change of note 25, 34 Addition of note 30 Notes concerning 2CAS control Addition of ...

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