HM628128ALP-7 HITACHI, HM628128ALP-7 Datasheet
HM628128ALP-7
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HM628128ALP-7 Summary of contents
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... HM628128A Series 131,072-word 8-bit High Speed CMOS Static RAM The Hitachi HM628128A is a CMOS static RAM organized 128 kword 8 bit. It realizes higher density, higher performance and low power consumption by employing 0.8 µm Hi-CMOS process technology. It offers low power standby power dissipation; therefore suitable for battery back-up systems. ...
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... HM628128ALP– HM628128ALP– HM628128ALP–10L 100 ns HM628128ALP–5SL 55 ns HM628128ALP–7SL 70 ns HM628128ALP–8SL 85 ns HM628128ALP–10SL 100 ns HM628128ALFP– HM628128ALFP– HM628128ALFP– HM628128ALFP–10 100 ns HM628128ALFP– HM628128ALFP– HM628128ALFP– HM628128ALFP– ...
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... Pin Arrangement HM628128ALP/ALFP Series A16 3 A14 4 A12 I/O0 14 I/ (Top View) Pin Description Pin name Function A0 – A16 Address I/O0 – I/O7 Input/output CS1 Chip select 1 CS2 Chip select 2 WE Write enable HM628128ALT Series ...
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HM628128A Series Block Diagram (MSB) A13 A15 A6 A7 A12 A14 A16 A5 A4 (LSB) I/O0 I/O7 CS2 CS1 WE OE Function Table CS1 OE WE CS2 ...
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Absolute Maximum Ratings Parameter Supply voltage relative Voltage on any pin relative to V Power dissipation Operating temperature Storage temperature Storage temperature under bias Note: 1. With respect –3.0 V for pulse half-width ...
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HM628128A Series DC Characteristics ( +70°C, V Parameter Symbol Input leakage current | Output leakage current |I LO Operating power supply I CC current: DC Operating power supply I CC1 current (HM628128 A-7/8/10) I CC1 ...
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AC Characteristics ( +70°C, V Test Conditions • Input pulse levels: 0 2.4 V (HM628128A-7/8/10 (HM628128A-5) • Input rise and fall times • Input and output timing reference ...
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HM628128A Series *4 Read Timing Waveform Address CS1 CS2 OE High Impedance Dout Notes and t are defined as the time at which the outputs achieve the open circuit conditions and HZ OHZ are not referred to output ...
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Write Cycle Parameter Symbol Write cycle time t WC Chip selection end of write Address setup time t AS Address valid end of write Write pulse width t WP Write recovery time t WR ...
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HM628128A Series Write Timing Waveform (1) ( Address OE CS1 CS2 * Dout Din 10 Clock Address Valid OHZ High Impedance * ...
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Write Timing Waveform (2) ( Address CS1 CS2 Dout Din Notes write occurs during the overlap of a low CS1, a high CS2, and a low WE. A write begins at the latest transition among ...
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HM628128A Series data bus contention. ≥ min + WHZ Low V Data Retention Characteristics ( +70°C) CC Parameter Symbol V for data retention Data retention current I CCDR (L ...
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Notes µA max 40˚C (L-version µA max 40˚C (L-L-version µA max 40˚C (L-SL-version). 4. CS2 controls address buffer, WE ...