ID82C54-10 Harris Corporation, ID82C54-10 Datasheet
ID82C54-10
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ID82C54-10 Summary of contents
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... GND 12 CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. © Copyright Harris Corporation 1997 CMOS Programmable Interval Timer Description The Harris 82C54 is a high performance CMOS Programma- ble Interval Timer manufactured using an advanced 2 micron CMOS process. ...
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... Ordering Information PART NUMBERS 8MHz 10MHz CP82C54 CP82C54-10 IP82C54 IP82C54-10 CS82C54 CS82C54-10 IS82C54 IS82C54-10 CD82C54 CD82C54-10 ID82C54 ID82C54-10 MD82C54/B MD82C54-10/B MR82C54/B MR82C54-10/B SMD # 8406501JA - SMD# 84065013A - CM82C54 CM82C54-10 Functional Diagram DATA/ BUS BUFFER RD READ/ WR WRITE LOGIC CONTROL ...
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Pin Description (Continued) DIP PIN SYMBOL NUMBER TYPE CLK CLOCK 2: Clock input of Counter 2. A0 ADDRESS: Select inputs for one of the three counters or Control Word Register for read/write ...
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Control Word Register The Control Word Register (Figure 2) is selected by the Read/Write Logic when A1 11. If the CPU then does a write operation to the 82C54, the data is stored in the Con- trol Word ...
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Operational Description General After power-up, the state of the 82C54 is undefined. The Mode, count value, and output of all Counters are undefined. How each Counter operates is determined when it is pro- grammed. Each Counter must be programmed before ...
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Possible Programming Sequence (Continued) LSB of Count - Counter 1 LSB of Count - Counter 0 MSB of Count - Counter 0 MSB of Count - Counter 1 MSB of Count - Counter 2 Possible Programming Sequence Control Word - ...
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Read least significant byte. 2. Write new least significant byte. 3. Read most significant byte. 4. Write new most significant byte counter is programmed to read or write two-byte counts, the following precaution applies: A program MUST ...
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Both count and status of the selected counter(s) may be latched simultaneously by setting both COUNT and STATUS bits D5 This is functionally the same as issuing two separate read-back commands at once, and the above dis- ...
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Mode 1: Hardware Retriggerable One-Shot OUT will be initially high. OUT will go low on the CLK pulse following a trigger to begin the one-shot pulse, and will remain low until the Counter reaches zero. OUT will then go high ...
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Mode 3: Square Wave Mode Mode 3 is typically used for Baud rate generation. Mode 3 is similar to Mode 2 except for the duty cycle of OUT. OUT will initially be high. When half the initial count has expired, ...
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LSB = 3 WR CLK GATE OUT LSB = 3 WR CLK GATE OUT ...
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Counter New counts are loaded and Counters are decremented on the falling edge of CLK. The largest possible initial count is 0; this is equivalent for binary counting and 10 for BCD counting. The counter does not ...
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Absolute Maximum Ratings Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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AC Electrical Specifications V CC SYMBOL PARAMETER READ CYCLE (1) TAR Address Stable Before RD (2) TSR CS Stable Before RD (3) TRA Address Hold Time After RD (4) TRR RD Pulse Width (5) TRD Data Delay from RD (6) ...
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Timing Waveforms DATA BUS DATA BUS RD, WR MODE WR CLK GATE OUT 82C54 (9) tAW (10) tSW VALID (13) tDW (12) tWW FIGURE 17. WRITE tAR (1) (2) tSR ...
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Burn-In Circuits VCC GND F10 F11 F12 GND R1 GND F10 R1 F11 R1 F12 R2 F0 OPEN NOTES 5.5V 0. GND = 0V 3. VIH = 4.5V 10% 4. VIL = ...
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Die Characteristics DIE DIMENSIONS: 129mils x 155mils x 19mils (3270 m x 3940 m x 483 m) METALLIZATION: Type: Si-Al-Cu Metallization Mask Layout CLK0 82C54 Thickness: Metal 1: 8k GLASSIVATION: Type: Nitrox Thickness: 10k 82C54 ...