CY7B9920-7SC Cypress Semiconductor Corporation., CY7B9920-7SC Datasheet
CY7B9920-7SC
Specifications of CY7B9920-7SC
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CY7B9920-7SC Summary of contents
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... Jitter: <200 ps peak to peak, <25 ps RMS • Compatible with Pentium™-based processors Functional Description The CY7B9910 and CY7B9920 Low Skew Clock Buffers offer low-skew system clock distribution. These multiple-output clock drivers optimize the timing of high-performance comput- er systems. Eight individual drivers can each drive terminated ...
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... Max 0.4V –500 – GND IN 2 CY7B9910 CY7B9920 Ambient Temperature + 10% – + 10% CY7B9920 Max. Min. Max. Unit V V –0.75 CC 0. – 1.35 0.8 –0.5 1. – ...
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... CC achieved. 2. Tested one output at a time, output shorted for less than one second, less than 10% duty cycle. Room temperature only. CY7B9920 outputs are not short circuit protected. 3. Total output current per output pair can be approximated by the following expression that includes device current plus load current: ...
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... JR Notes: 7. Test measurement levels for the CY7B9910 are TTL levels (1.5V to 1.5V). Test measurement levels for the CY7B9920 are CMOS levels (V conditions assume signal transition times of 2ns or less and output loading as shown in the AC Test Loads and Waveforms unless otherwise specified. 8. Guaranteed by statistical correlation. Tested initially and after any design or process changes that may affect these parameters. ...
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... FS = LOW 15 [9, 10 MID 25 [9, 10, 11 HIGH 40 5.0 5.0 [13, 14] 0.3 [8, 15] –0.7 0.0 [16] –1.2 0.0 0.15 1.5 0.15 1.5 [8] Peak to Peak [8] RMS t t REF RPWL t RPWH t ODCV t ODCV t SKEW t SKEW 5 CY7B9910 CY7B9920 CY7B9920–7 Max. Min. Typ. Max. Unit MHz [12 5.0 5.0 0.75 0.3 0.75 1.5 1.5 +0.7 –0.7 0.0 +0.7 +1.2 –1.2 0.0 +1.2 2.5 0.5 3.0 5.0 2.5 0.5 3.0 5.0 0.5 0.5 200 200 ...
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... PLL filter not recommended that more than two clock buffers be connected in series. REF Figure 2. Board-to-Board Clock Distribution 6 CY7B9910 CY7B9920 LOAD Z 0 LOAD Z 0 LOAD Z 0 LOAD Z 0 7B9910–9 LOAD ...
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... CY7B9910–7SC CY7B9910–7SI CY7B9920–7SC CY7B9920–7SI Document #: 38–00437–B Package Diagram © Cypress Semiconductor Corporation, 1997. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user ...