X5045 Xicor, X5045 Datasheet

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X5045

Manufacturer Part Number
X5045
Description
X5045CPU Supervisor with 4K SPI EEPROM
Manufacturer
Xicor
Datasheet

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CPU Supervisor with 4K SPI EEPROM
These devices combine four popular functions, Power-on
Reset Control, Watchdog Timer, Supply Voltage Supervision,
and Block Lock Protect Serial EEPROM Memory in one
package. This combination lowers system cost, reduces
board space requirements, and increases reliability.
Applying power to the device activates the power-on reset
circuit which holds RESET/RESET active for a period of
time. This allows the power supply and oscillator to stabilize
before the processor executes code.
The Watchdog Timer provides an independent protection
mechanism for microcontrollers. When the microcontroller
fails to restart a timer within a selectable time out interval,
the device activates the RESET/RESET signal. The user
selects the interval from three preset values. Once selected,
the interval does not change, even after cycling the power.
The device’s low V
system from low voltage conditions, resetting the system
when V
RESET/RESET is asserted until V
operating level and stabilizes. Four industry standard V
thresholds are available, however, Intersil’s unique circuits
allow the threshold to be reprogrammed to meet custom
requirements or to fine-tune the threshold for applications
requiring higher precision.
The memory portion of the device is a CMOS Serial
EEPROM array with Intersil’s block lock protection. The
array is internally organized as 512 x 8. The device features
a Serial Peripheral Interface (SPI) and software protocol
allowing operation on a simple four-wire bus.
The device utilizes Intersil’s proprietary Direct Write
providing a minimum endurance of 100,000 cycles and a
minimum data retention of 100 years.
查询X5043供应商
CC
falls below the minimum V
CC
detection circuitry protects the user’s
®
1
CC
Data Sheet
CC
returns to proper
trip point.
cell,
1-888-INTERSIL or 1-888-468-3774
TRIP
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
Features
• Low V
• Selectable Time Out Watchdog Timer
• Long Battery Life with Low Power Consumption
• 4Kbits of EEPROM–1M Write Cycle Endurance
• Save Critical Data with Block Lock
• Built-in Inadvertent Write Protection
• SPI Interface - 3.3MHz Clock Rate
• Minimize Programming Time
• Available Packages
• Pb-Free Plus Anneal Available (RoHS Compliant)
Applications
• Communications Equipment
• Industrial Systems
• Computer Systems
• Battery Powered Equipment
September 16, 2005
- Four standard reset threshold voltages
- Re-program low V
- Reset signal valid to V
- <50µA max standby current, watchdog on
- <10µA max standby current, watchdog off
- Protect 1/4, 1/2, all or none of EEPROM array
- Write enable latch
- Write protect pin
- 16-byte page write mode
- 5ms write cycle time (typical)
- 8 Ld MSOP, 8 Ld SOIC, 8 Ld PDIP
- 14 Ld TSSOP
- Routers, Hubs, Switches
- Set Top Boxes
- Process Control
- Intelligent Instrumentation
- Desktop Computers
- Network Servers
4.63V, 4.38V, 2.93V, 2.63V
special programming sequence.
All other trademarks mentioned are the property of their respective owners.
CC
|
Detection and Reset Assertion
Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2005. All Rights Reserved
CC
reset threshold voltage using
CC
X5043, X5045
= 1V
4K, 512 x 8 Bit
Memory
FN8126.1

Related parts for X5045

X5045 Summary of contents

Page 1

... Battery Powered Equipment CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 All other trademarks mentioned are the property of their respective owners. X5043, X5045 4K, 512 x 8 Bit FN8126.1 Detection and Reset Assertion reset threshold voltage using ...

Page 2

... POR and Low RESET (X5043) Voltage Reset RESET (X5045) Generation Reset & Watchdog Timebase Watchdog Timer Reset Status Register EEPROM Array 4Kbits X5043, X5045 STANDARD V LEVEL SUFFIX TRIP 4.63V (+/-2.5%) -4.5A 4.38V (+/-2.5%) -4.5 2.93V (+/-2.5%) -2.7A 2.63V (+/-2.5%) -2.7 See “Ordering Information” on page 3. for more details For Custom Settings, call Intersil. ...

Page 3

... PART (ACTIVE LOW) MARKING X5043P-4.5A X5045P-4.5A X5043PZ-4.5A (Note) X5045PZ-4.5A (Note) X5043PI-4.5A X5045PI-4.5A X5043PIZ-4.5A (Note) X5045PIZ-4.5A (Note) X5045P Z AM X5043S8-4.5A X5043 AL X5045S8-4.5A X5043S8Z-4.5A (Note) X5043 Z AL X5045S8Z-4.5A (Note) X5043S8I-4.5A* X5043 AM X5045S8I-4.5A* X5043S8IZ-4.5A* X5043 Z AM X5045S8IZ-4.5A* (Note) (Note) X5043M8-4.5A AEM X5045M8-4.5A X5043M8Z-4.5A DBS X5045M8Z-4 ...

Page 4

... PART NUMBER RESET PART (ACTIVE LOW) MARKING X5043P-2.7A X5043P AN X5045P-2.7A X5043PZ-2.7A (Note) X5043P Z AN X5045PZ-2.7A (Note) X5043PI-2.7A X5043P AP X5045PI-2.7A X5043PIZ-2.7A (Note) X5043P Z AP X5045PIZ-2.7A (Note) X5045P Z AP X5043S8-2.7A* X5043 AN X5045S8-2.7A X5043S8Z-2.7A* X5043 Z AN X5045S8Z-2.7A (Note) (Note) X5043S8I-2.7A* X5043 AP X5045S8I-2.7A X5043S8IZ-2.7A* X5043 Z AP X5045S8IZ-2 ...

Page 5

... When WP is held high, all functions, including non volatile writes operate normally. WP going low while CS is still low will interrupt a write to the X5043, X5045. If the internal write 5 X5043, X5045 cycle has already been initiated, WP going low will have no affect on a write ...

Page 6

... V Threshold Reset Procedure CC The X5043, X5045 are shipped with a standard V threshold (V ) voltage. This value will not change over TRIP normal operating and storage conditions. However, in applications where the standard V ...

Page 7

... SCK SI 06h WREN FIGURE 2. RESET Adjust V TRIP Adj. Run 7 X5043, X5045 V = 15-18V Bits 02h Write Address LEVEL SEQUENCE (V > 3V 15–18V) TRIP X5043 X5045 FIGURE 3. SAMPLE V ...

Page 8

... A Note: *Instructions are shown MSB in leftmost position. Instructions are transferred MSB first. 8 X5043, X5045 SPI Serial Memory The memory portion of the device is a CMOS Serial EEPROM array with Intersil’s block lock protection. The array is internally organized as 512 x 8 bits. The device features a Serial Peripheral Interface (SPI) and software protocol allowing operation on a simple four-wire bus ...

Page 9

... These 8 bits of data correspond to the contents of the status register. The operation ends with CS going HIGH does not go HIGH between WREN and WRSR, the WRSR instruction is ignored. ARRAY ADDRESSES PROTECTED BL0 X5043, X5045 0 None 1 $180–$1FF 0 $100– ...

Page 10

... DEVICE PIN (WP SCK SI High Impedance SCK SI High Impedance SO 10 X5043, X5045 TABLE 2. DEVICE PROTECT MATRIX MEMORY BLOCK PROTECTED AREA UNPROTECTED AREA Protected Protected Protected Protected Protected Writable Instruction ...

Page 11

... SI High Impedance SO 11 X5043, X5045 For the write operation (byte or page write completed, CS must be brought HIGH after bit 0 of the last complete data byte to be written is clocked in brought HIGH at any other time, the write operation will not be completed (Figure 9) ...

Page 12

... Enable Latch. • CS must come HIGH at the proper clock count in order to start a nonvolatile write cycle. • Block Protect bits provide additional level of write protection for the memory array. • The WP pin LOW blocks nonvolatile write operations. 12 X5043, X5045 ...

Page 13

... This parameter is periodically sampled and not 100% tested. 3. SCK frequency measured from V x 0.1 X5043, X5045 Recommended Operating Conditions Temperature: Commercial 0°C to +70°C Industrial . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +85°C Supply Voltage: -2.7, -2. 2.7V to 5.5V Blank, -4. 4.5V to 5.5V ...

Page 14

... This parameter is periodically sampled and not 100% tested the time from the rising edge of CS after a valid write sequence has been sent to the end of the self-timed internal nonvolatile write cycle X5043, X5045 A.C. Test Conditions CC Input pulse levels 5V Input rise and fall times Input and output timing level 4.6kΩ ...

Page 15

... High Impedance SO Symbol Table WAVEFORM INPUTS Must be steady May change from LOW to HIGH May change from HIGH to LOW Don’t Care: Changes Allowed N/A 15 X5043, X5045 t t CYC MSB–1 Out OUTPUTS Will be steady Will change from LOW to HIGH ...

Page 16

... RESET/RESET Output Timing SYMBOL PARAMETER t Watchdog Time Out Period, WDO WD1 = 1, WD0 = 1 (default) WD1 = 1, WD0 = 0 WD1 = 0, WD0 = 1 WD1 = 0, WD0 = Pulse Width to Reset the Watchdog CST t Reset Time Out RST 16 X5043, X5045 V TRIP t PURST 0 Volts t PURST t R PARAMETER t CST WDO ...

Page 17

... Programming Voltage Programmed Voltage Range TRAN TRIP V V Program variation after programming (0-75°C). (Programmed at 25°C.) tv TRIP V programming parameters are periodically sampled and are not 100% tested. TRIP 17 X5043, X5045 V TRIP t t PCS 02h 01h or 03h DESCRIPTION t t THD TSU t VPH ...

Page 18

... Packaging Information 8-Lead Miniature Small Outline Gull Wing Package Type M 0.012 + 0.006 / -0.002 (0.30 + 0.15 / -0.05) 0.040 ± 0.002 (1.02 ± 0.05) 0.007 (0.18) 0.005 (0.13) 18 X5043, X5045 0.118 ± 0.002 (3.00 ± 0.05) 0.118 ± 0.002 (3.00 ± 0.05) 0.030 (0.76) 0.0216 (0.55) 7° Typ. 0.036 (0.91) 0.032 (0.81) 0.008 (0.20) 0.004 (0.10) 0.150 (3.81) Ref. 0.193 (4.90) Ref. ...

Page 19

... Packaging Information Half Shoulder Width On All End Pins Optional .073 (1.84) Typ. 0.010 (0.25) NOTE: 1. ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS) 2. PACKAGE DIMENSIONS EXCLUDE MOLDING FLASH 19 X5043, X5045 8-Lead Plastic Dual In-Line Package Type P 0.430 (10.92) 0.360 (9.14) Pin 1 Index Pin 1 0.300 (7.62) Ref. Seating Plane 0.150 (3.81) ...

Page 20

... Packaging Information 8-Lead Plastic Small Outline Gull Wing Package Type S Pin 1 Index 0.010 (0.25) 0.020 (0.50) 0° - 8° 0.016 (0.410) 0.037 (0.937) NOTE: ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS) 20 X5043, X5045 Pin 1 0.014 (0.35) 0.019 (0.49) 0.188 (4.78) 0.197 (5.00) (4X) 7° 0.050 (1.27) X 45° 0.0075 (0.19) 0.250" 0.010 (0.25) FOOTPRINT 0 ...

Page 21

... However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 21 X5043, X5045 14-Lead Plastic, TSSOP, Package Type V .025 (.65) BSC .169 (4.3) ...

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