AM80A-300L-120F18 Astec Power, AM80A-300L-120F18 Datasheet - Page 20

• Manufacturer Part Number: AM80A-300L-120F18
• Manufacturer: Astec Power

20
The overvoltage set point may be adjusted between 10%
and 50% above the output voltage (V
tracks adjustments made to the output voltage using V
ADJ.
OVP ADJ should be used to increase the OVP margin if the
voltage drop between power output pins and remote sense
is more than 0.2V
Power Good/Identification (PG/ID)
(Not apply to AM80A-048L-050P25D033P30)
This pin provides an indication that the module's converters
are working, and can also be used to identify the factory set
output voltage of the module.
The PG/ID pin goes high to the level of the output voltage
(V
power. The output goes low if the converters stop operating
due to a fault such as an overtemperature or overvoltage
condition. The PG/ID pin will also go low if the module is
disabled via the ENABLE pin or under light load condition
(seespecification).
O
%V
) to indicate that the module is operating and delivering
≤0.2V
AMPSS
≤1.0V
Onom
320V/ 300V/ 150V (nom) Models
Converter not running
Converter not running
140%
120%
100%
48V (nom) Models
80%
Converter running
Converter running
®
Tracking overvoltage
Reference Manual
Vo
Vo
V
VADJ
7
Programmed
output voltage
V
6
O
1
12
), and automatically
OUTPUT
TO LOAD
OVP
Margin
+V
-V
O
O
The resistance between the PG/ID pin and the +ve output
of the module can be used to determine the output voltage
of the module with no power applied according to the
table:
Clock Signals (CLK IN, CLK OUT)
The module's internal clock is accurate and stable over its
full operating range and synchronization is not normally
required, but it can reduce noise in paralleled systems.
Clock signals can be wired in series (the CLK OUT pin of
one module to the CLK IN pin of the next etc) in which
case all the modules will be synchronized with the first
module in the chain. Alternatively, an external clock signal
of 5Vpk-pk at 1MHz±10% can be connected to the CLK IN
pins of all the modules.
If the clock input to any module fails, the module will
automatically switch back to its internal clock and will
continue to operate normally. The CLK IN and CLK OUT
signals are AC coupled, so any module can clock another
module regardless of polarity.
From CLKOUT of
previous module
CLK IN
7
6
O u tpu t V oltag e
CLK OUT
(V )
1.2
2.2
6.5
3.3
12
15
24
28
5
12
1
+SENSE
-SENSE
+O/P
-O/P
R e s is tan c e
CLKIN
(K Ω Ω Ω Ω )
7
6
1.2
2.2
6.8
3.3
5.1
12
15
24
27
Rev. 05 Mar 99
CLKOUT
12
1
+SENSE
-SENSE
To CLKIN of
next module
+O/P
-O/P