MAX3645EEE+T Maxim Integrated Products, MAX3645EEE+T Datasheet - Page 6

IC AMP LIMITING 16-QSOP

MAX3645EEE+T

Manufacturer Part Number
MAX3645EEE+T
Description
IC AMP LIMITING 16-QSOP
Manufacturer
Maxim Integrated Products
Type
Limiting Amplifierr
Datasheet

Specifications of MAX3645EEE+T

Applications
Data Quantizer, Optical Receivers
Mounting Type
Surface Mount
Package / Case
16-QSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
The MAX3645 consists of gain stages, offset correction,
power detector, LOS indicators, and PECL output buffers.
See Figure 2 for the functional diagram.
The data inputs have a single-ended input resistance of
4.8kΩ and are internally DC-biased to V
Figure 3). External capacitors are required to AC-cou-
ple the data signals. Pattern-dependent jitter is mini-
mized by using coupling capacitor values large enough
to pass the lowest frequencies of interest (consecutive
ones and zeros) with the given input resistance.
Typically, 0.1µF coupling capacitors yield a -3dB fre-
quency of 354Hz. Capacitor tolerance and input resis-
+2.97V to +5.5V, 125Mbps to 200Mbps Limiting
Amplifier with Loss-of-Signal Detector
6
PIN
10
11
12
13
14
15
16
1
2
3
4
5
6
7
8
9
_______________________________________________________________________________________
MINDSPEED
MC2045-2Y
PIN NAME
MC2045-2
GNDA
GNDE
CAZ+
D
D
CAZ-
V
V
V
JAM
D
D
NC
CCA
C
ST
ST
OUT
OUT
CCE
SET
IN
IN
F
PIN NAME
MAX3645
Detailed Description
DOUT+
MAXIM
DOUT-
GNDA
GNDE
CAZ2
CAZ1
V
DIN+
V
DIN-
CSD
N.C.
LOS
LOS
DIS
TH
CCA
CCE
Offset-Correction-Loop Capacitor Connection. A capacitor connected between this pin and
CAZ1 sets the time constant of the offset correction loop. The offset correction is disabled
when the CAZ1 and CAZ2 pins are shorted together.
Offset-Correction-Loop Capacitor Connection. A capacitor connected between this pin and
CAZ2 sets the time constant of the offset correction loop. The offset correction is disabled
when the CAZ2 and CAZ1 pins are shorted together.
Analog Supply Ground. Must be at the same potential as the GNDE pin.
Positive Data Input
Negative Data Input
+2.97V to +5.5V Analog Supply Voltage. Must be at same potential as the V
S i g nal - D etect- Fi l ter C ap aci tor C onnecti on. C onnect the C
Disable Input, PECL or CMOS Compatible. Data outputs are held to a static logic 0 when DIS is
asserted high. The LOS function remains active when the outputs are disabled. When
connected to the LOS pin, an automatic squelch function is enabled.
Positive Loss-of-Signal Output, PECL. LOS is high when the level of the input signal drops
below the threshold set by the TH input. LOS is low when the signal level is above the
threshold. LOS can be connected directly to DIS for automatic squelch.
Negative Loss-of-Signal Output, PECL. LOS is low when the level of the input signal drops
below the threshold set by the TH input. LOS is high when the signal level is above the
threshold.
Digital Supply Ground. Must be at the same potential as the GNDA pin.
Negative Data Output, PECL. A high at DIS forces DOUT- high.
Positive Data Output, PECL. A high at DIS forces DOUT+ low.
+2.97V to +5.5V Digital Supply Voltage. Must be at the same potential as the V
No Connection
Loss-of-Signal Threshold Pin. Resistor (R
be left open.
CC
Data Input
- 0.87V (see
tance variation (3.3kΩ to 6.4kΩ) must be considered to
accurately calculate the -3dB frequency. Capacitor val-
ues should be chosen that set the -3dB frequency at
least a factor of 10 below the lowest frequency of inter-
est. A capacitor value of 0.1µF is recommended.
The limiting amplifier provides approximately 74dB
(R
fier susceptible to small DC offsets in the signal path.
To correct DC offsets, the amplifier has an internal feed-
back loop that acts as a DC autozero circuit. By cor-
recting the DC offsets, the limiting amplifier improves
receiver sensitivity and power-detector accuracy.
TH
= 100Ω) of gain. This large gain makes the ampli-
TH
FUNCTION
) to ground sets the LOS threshold. This pin cannot
Gain Stage and Offset Correction
S D
cap aci tor b etw een C S D and V
Pin Description
CCE
CCA
pin.
pin.
C C A
.

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