HM5165805FLTT-6 HITACHI, HM5165805FLTT-6 Datasheet

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HM5165805FLTT-6

Manufacturer Part Number
HM5165805FLTT-6
Description
Manufacturer
HITACHI
Datasheet

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Description
The Hitachi HM5164805F Series, HM5165805F Series are 64M-bit dynamic RAMs organized as
8,388,608-word
technology. HM5164805F Series, HM5165805F Series offer Extended Data Out (EDO) Page Mode as a
high speed access mode. They have the package variation of standard 32-pin plastic SOJ and standard 32-
pin plastic TSOPII.
Features
Single 3.3 V supply: 3.3 V 0.3 V
Access time: 50 ns/60 ns (max)
Power dissipation
EDO page mode capability
Refresh cycles
Active: 414 mW/378 mW (max) (HM5164805F Series)
Standby : 1.8 mW (max) (CMOS interface)
RAS-only refresh
CBR/Hidden refresh
8192 cycles /64 ms (HM5164805F, HM5164805FL)
4096 cycles /64 ms (HM5165805F, HM5165805FL)
4096 cycles /64 ms (HM5164805F, HM5164805FL, HM5165805F, HM5165805FL)
: 486 mW/414 mW (max) (HM5165805F Series)
: 1.1 mW (max) (L-version)
8-bit. They have realized high performance and low power by employing CMOS process
64 M EDO DRAM (8-Mword
HM5164805F Series
HM5165805F Series
8 k Refresh/4 k Refresh
8-bit)
ADE-203-1057B (Z)
Nov. 30, 1999
Rev. 2.0

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HM5165805FLTT-6 Summary of contents

Page 1

... HM5165805F Series 64 M EDO DRAM (8-Mword Description The Hitachi HM5164805F Series, HM5165805F Series are 64M-bit dynamic RAMs organized as 8,388,608-word 8-bit. They have realized high performance and low power by employing CMOS process technology. HM5164805F Series, HM5165805F Series offer Extended Data Out (EDO) Page Mode as a high speed access mode ...

Page 2

... Ordering Information Type No. HM5164805FJ-5 HM5164805FJ-6 HM5164805FLJ-5 HM5164805FLJ-6 HM5165805FJ-5 HM5165805FJ-6 HM5165805FLJ-5 HM5165805FLJ-6 HM5164805FTT-5 HM5164805FTT-6 HM5164805FLTT-5 HM5164805FLTT-6 HM5165805FTT-5 HM5165805FTT-6 HM5165805FLTT-5 HM5165805FLTT-6 2 Access time Package 50 ns 400-mil 32-pin plastic SOJ 60 ns (CP-32DC 400-mil 32-pin plastic TSOP ...

Page 3

Pin Arrangement (HM5164805F Series) 32-pin SOJ I/O0 2 I/O1 3 I/ RAS ...

Page 4

HM5164805F Series, HM5165805F Series Pin Arrangement (HM5165805F Series) 32-pin SOJ I/O0 2 I/O1 3 I/ RAS ...

Page 5

Block Diagram (HM5164805F Series Column • address to • buffers • A9 • • • Row address buffers A10 to A12 HM5164805F Series, HM5165805F Series RAS CAS WE Timing and control Column decoder 8M array 8M array 8M ...

Page 6

HM5164805F Series, HM5165805F Series Block Diagram (HM5165805F Series Column • address to • buffers • A10 • • • Row address buffers A11 6 RAS CAS WE Timing and control Column decoder 8M array 8M array 8M array ...

Page 7

Operation Table RAS CAS Notes (inactive ...

Page 8

HM5164805F Series, HM5165805F Series DC Characteristics (HM5164805F Series) Parameter 1, 2 Operating current* * Standby current Standby current (L-version) RAS-only refresh current Standby current* CAS-before-RAS refresh current 1, 3 EDO page mode current Battery backup current* ...

Page 9

DC Characteristics (HM5165805F Series) Parameter 1, 2 Operating current* * Standby current Standby current (L-version) RAS-only refresh current Standby current* CAS-before-RAS refresh current 1, 3 EDO page mode current Battery backup current* (Standby with CBR refresh) ...

Page 10

HM5164805F Series, HM5165805F Series Capacitance (Ta = 25˚C, V Parameter Input capacitance (Address) Input capacitance (Clocks) Output capacitance (Data-in, Data-out) Notes : 1. Capacitance measured with Boonton Meter or effective capacitance measuring method. 2. RAS and CAS = V IH ...

Page 11

AC Characteristics ( +70˚C, V Test Conditions • Input rise and fall time • Input pulse levels • Input timing reference levels: 0.8 V, 2.0 V • Output timing ...

Page 12

HM5164805F Series, HM5165805F Series Read Cycle Parameter Access time from RAS Access time from CAS Access time from address Access time from OE Read command setup time Read command hold time to CAS Read command hold time from RAS Read ...

Page 13

Write Cycle Parameter Write command setup time Write command hold time Write command pulse width Write command to RAS lead time Write command to CAS lead time Data-in setup time Data-in hold time Read-Modify-Write Cycle Parameter Read-modify-write cycle time RAS ...

Page 14

HM5164805F Series, HM5165805F Series EDO Page Mode Cycle Parameter EDO page mode cycle time EDO page mode RAS pulse width Access time from CAS precharge RAS hold time from CAS precharge Output data hold time from CAS low CAS hold ...

Page 15

Self Refresh Mode (L-version) Parameter RAS pulse width (self refresh) RAS precharge time (self refresh) CAS hold time (self refresh) Notes measurements assume initial pause of 200 s is required after power up followed by ...

Page 16

HM5164805F Series, HM5165805F Series 20. t (min) can be achieved during a series of EDO page mode write cycles or EDO page mode HPC read cycles. If both write and read operation are mixed in a EDO page mode RAS ...

Page 17

Timing Waveforms* Read Cycle RAS t T CAS t ASR Address Row WE Din OE Dout HM5164805F Series, HM5165805F Series RAS t CSH t t RCD RSH t CAS t t RAD RAL t CAL t ...

Page 18

HM5164805F Series, HM5165805F Series Early Write Cycle RAS t T CAS t t ASR RAH Row Address WE Din Dout RAS t CSH t t RCD RSH t CAS t t ASC CAH Column t t ...

Page 19

Delayed Write Cycle* RAS t T CAS t t RAH ASR Row Address WE Din OE Dout HM5164805F Series, HM5165805F Series RAS t CSH t t RCD RSH t CAS t t ASC CAH Column t ...

Page 20

HM5164805F Series, HM5165805F Series 18 Read-Modify-Write Cycle* RAS t T CAS t ASR Address Row WE Din OE Dout 20 t RWC t RAS t t RCD CAS t RAD ASC RAH CAH Column t CWD t ...

Page 21

RAS-Only Refresh Cycle RAS t CRP CAS Address t OFR t OFF Dout HM5164805F Series, HM5165805F Series RAS ASR RAH Row High RPC CRP 21 ...

Page 22

HM5164805F Series, HM5165805F Series CAS-Before-RAS Refresh Cycle t RP RAS t RPC t CP CAS WE Address t OFR t OFF Dout RAS RPC CSR CHR CP ...

Page 23

Hidden Refresh Cycle RAS RCD CAS t RAD t t RAH ASR Address Row WE Din OE Dout HM5164805F Series, HM5165805F Series RAS RP RAS t RSH t RAL t t ...

Page 24

HM5164805F Series, HM5165805F Series EDO Page Mode Read Cycle (1) RAS CSH t CAS CAS t RCHR t RCS CAH RAH ASC t ASR Address Row Column 1 t CAL t DZC High-Z ...

Page 25

EDO Page Mode Read Cycle (2) RAS CSH t CAS CAS t RCS CAH t RAH ASC ASR Address Row Column 1 t CAL t DZC High-Z Din t DZO OE t OEA ...

Page 26

HM5164805F Series, HM5165805F Series EDO Page Mode Early Write Cycle RAS RCD CAS t t RAH ASR Row Address WE Din Dout 26 t RASP t t CSH HPC CAS CAS t t ...

Page 27

EDO Page Mode Delayed Write Cycle* RAS RCD CAS t RAD t ASR t RAH Row Address t RCS WE Din t DZO OE t CLZ Dout HM5164805F Series, HM5165805F Series 18 t RASP ...

Page 28

HM5164805F Series, HM5165805F Series EDO Page Mode Read-Modify-Write Cycle* RAS RCD CAS t RAD t t ASR ASC t RAH Row Column 1 Address WE t RCS Din t DZO OE t OEA t CAC t AA ...

Page 29

EDO Page Mode Mix Cycle (1)* RAS CAS CAS t CSH t RCD t t WCS WCH WE t ASC t t CAH t RAH ASR Address Row Column Din Din 1 ...

Page 30

HM5164805F Series, HM5165805F Series EDO Page Mode Mix Cycle (2) * RAS CSH t CAS CAS t RCD t RCHR t RCS ASC CAH t t RAH ASR Address Row Column 1 t CAL ...

Page 31

Self Refresh Cycle (L-version RAS t RPC t t CSR CP CAS t WRP WE t OFR t OFF Dout HM5164805F Series, HM5165805F Series 23, 24 RASS WRH High-Z t RPS t CRP ...

Page 32

... HM5164805F Series, HM5165805F Series Package Dimensions HM5164805FJ/ FLJ Series HM5165805FJ/ FLJ Series (CP-32DC 1.165 Max *0.43 0.10 0.41 0.08 *Dimension including the plating thickness Base material dimension 32 20.95 21.38 Max 17 16 0.74 1.27 0.10 Hitachi Code JEDEC EIAJ Weight (reference value) Unit: mm 9.40 0.25 CP-32DC — Conforms 1.2 g ...

Page 33

... HM5164805FTT/FLTT Series HM5165805FTT/FLTT Series (TTP-32DC) 20.95 21.35 Max 32 1 *0.42 0.08 0.21 0.40 0.06 1.15 Max 0.10 *Dimension including the plating thickness Base material dimension HM5164805F Series, HM5165805F Series 17 16 1.27 M 11.76 Hitachi Code JEDEC EIAJ Weight (reference value) 0.80 0.20 0 – 5 0.50 0.10 TTP-32DC Conforms — 0.51 g Unit ...

Page 34

... HM5164805F Series, HM5165805F Series Cautions 1. Hitachi neither warrants nor grants licenses of any rights of Hitachi’s or any third party’s patent, copyright, trademark, or other intellectual property rights for information contained in this document. Hitachi bears no responsibility for problems that may arise with third party’s rights, including intellectual property rights, in connection with use of the information contained in this document ...

Page 35

Revision Record Rev. Date Contents of Modification 0.0 May. 25, 1999 Initial issue 1.0 Oct. 5, 1999 Features: Change of Power dissipation Standby (L-version) max: TBD to 1 Characteristics I CC2 I CC10 I CC11 2.0 Nov. 30, ...

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