AD818ARZ Analog Devices Inc, AD818ARZ Datasheet - Page 12

IC VIDEO OPAMP LP 8-SOIC

AD818ARZ

Manufacturer Part Number
AD818ARZ
Description
IC VIDEO OPAMP LP 8-SOIC
Manufacturer
Analog Devices Inc
Datasheets

Specifications of AD818ARZ

Slew Rate
500 V/µs
Applications
Voltage Feedback
Number Of Circuits
1
-3db Bandwidth
130MHz
Current - Supply
7mA
Current - Output / Channel
50mA
Voltage - Supply, Single/dual (±)
5 V ~ 36 V, ±2.5 V ~ 18 V
Mounting Type
Surface Mount
Package / Case
8-SOIC (0.154", 3.90mm Width)
Gain Bandwidth
130MHz
Supply Voltage Range
± 2.5V To ± 18V
No. Of Amplifiers
1
Output Current
50mA
Amplifier Output
Single Ended
Amplifier Type
Low Power, Video
Bandwidth
130 MHz
Common Mode Rejection Ratio
120
Current, Input Bias
3.3 μA
Current, Input Offset
25 nA
Current, Output
50 mA
Current, Supply
7.5 mA
Harmonic Distortion
63 dB
Impedance, Thermal
155 °C/W
Package Type
SOIC-8
Resistance, Input
300 Kilohms
Temperature, Operating, Range
-40 to +85 °C
Voltage, Input
-13.4 to +14.3 V (Common-Mode)
Voltage, Noise
10 nV/sqrt Hz
Voltage, Offset
0.5 mV
Voltage, Output, High
+13.7 V
Voltage, Output, Low
-13.7 V
Voltage, Supply
±15 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

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AD818
AD818 SETTLING TIME
Settling time primarily comprises two regions. The first is the slew
time in which the amplifier is overdriven, where the output voltage
rate of change is at its maximum. The second is the linear time
period required for the amplifier to settle to within a specified
percentage of the final value.
Measuring the rapid settling time of the AD818 (45 ns to 0.1%
and 80 ns to 0.01%—10 V step) requires applying an input pulse
with a very fast edge and an extremely flat top. With the AD818
configured in a gain of –1, a clamped false summing junction
responds when the output error is within the sum of two diode
voltages (approximately 1 V). The signal is then amplified 20 times
by a clamped amplifier whose output is connected directly to a
sampling oscilloscope.
GENERATOR
TTL LEVEL
OUTPUT
SIGNAL
0 TO
50Hz
SUPPLY
POWER
10V
GROUND
GROUND
ANALOG
DIGITAL
1, 14
7, 8
EI&S
DL1A05GM
MERCURY
RELAY
50
COAX
CABLE
2.2 F
50
500
1k
NULL
ADJUST
ERROR
SIGNAL
OUTPUT
0.01 F
100
Figure 7. Settling Time Test Circuit
AD818
FALSE
SUMMING
NODE
+V
500
S
5pF–18pF
–V
ERROR AMPLIFIER
V
ERROR
S
2.2 F
1k
OUTPUT
DEVICE
UNDER
TEST
–12–
2
HP2835
0.01 F
0.01 F
A High Performance Video Line Driver
The buffer circuit shown in Figure 8 will drive a back-terminated
75 W video line to standard video levels (1 V p-p) with 0.1 dB
gain flatness to 55 MHz with only 0.05∞ and 0.01% differential
phase and gain at the 3.58 MHz NTSC subcarrier frequency.
This level of performance, which meets the requirements for
high definition video displays and test equipment, is achieved
using only 7 mA quiescent current.
100
10
V
IN
10pF
SCOPE PROBE
CAPACITANCE
1.9k
0.47 F
75
R
AD829
T
1k
+V
NOTE
USE CIRCUIT BOARD
WITH GROUND PLANE
S
–V
Figure 8. Video Line Driver
S
TEKTRONIX P6201
FET PROBE TO
TEKTRONIX TYPE 11402
OSCILLOSCOPE
PREAMP INPUT SECTION
1k
AD818
0.01 F
+15V
–15V
2
HP2835
0.47 F
0.01 F
0.01 F
100
1M
SHORT, DIRECT CONNECTION
TO TEKTRONIX TYPE 11402
OSCILLOSCOPE PREAMP
INPUT SECTION
2.2 F
2.2 F
75
R
BT
15pF
75
REV.
R
75
T
D

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