CY37256P160-83UMB Cypress Semiconductor Corporation., CY37256P160-83UMB Datasheet
CY37256P160-83UMB
Specifications of CY37256P160-83UMB
Available stocks
Related parts for CY37256P160-83UMB
CY37256P160-83UMB Summary of contents
Page 1
Features • 256 macrocells in sixteen logic blocks • In-System Reprogrammable (ISR™) — JTAG-compliant on-board programming — Design changes don’t cause pinout changes — Design changes don’t cause timing changes • 192 I/Os — plus 5 dedicated inputs ...
Page 2
Functional Description The CY37256 is an In-System Reprogrammable (ISR) Com- plex Programmable Logic Device (CPLD) and is part of the Ultra37000™ family of high-density, high-speed CPLDs. Like all members of the Ultra37000 family, the CY37256 is de- signed to bring ...
Page 3
Pin Configurations GND I I/O /TCLK GND ...
Page 4
Pin Configurations (continued) GND 1 2 I TCLK I/O 29 GND 13 I/O ...
Page 5
Pin Configurations (continued GND I/O NC I/O I/O I I/O I/O I/O I/O I/O I I/O NC I/O I/O ...
Page 6
Maximum Ratings (Above which the useful life may be impaired. For user guide- lines, not tested.) Storage Temperature ................................. – +150 C Ambient Temperature with Power Applied ............................................. – +125 C Supply Voltage to Ground Potential ...
Page 7
Electrical Characteristics Over the Operating Range Parameter Description V Output HIGH Voltage OH V Output HIGH Voltage with OHZ [7] Output Disabled V Output LOW Voltage OL V Input HIGH Voltage IH V Input LOW Voltage IL I Input Load ...
Page 8
AC Test Loads and Waveforms 238 (COM'L) 319 (MIL) 5V OUTPUT 170 (COM' 236 (MIL) INCLUDING JIG AND SCOPE (a) 37256-5 Equivalent to: THÉVENIN EQUIVALENT 99 (COM'L) 136 (MIL) 2.08V(COM'L) OUTPUT 2.13V(MIL 37256-8 [8] ...
Page 9
Switching Characteristics Over the Operating Range Parameter Description Combinatorial Mode Parameters [10, 11, 12] t Input to Combinatorial Output PD [10, 11, 12] t Input to Output Through Transparent Input or Out- PDL put Latch [10, 11, 12] t Input ...
Page 10
Switching Characteristics Over the Operating Range Parameter Description t Buried Register Used as an Input Register or IHPT Latch Data Hold Time [10, 11, 12] t Product Term Clock or Latch Enable (PTCLK) to CO2PT Output Delay (Through Logic Array) ...
Page 11
Typical I Characteristics The typical pattern is a 16-bit up counter, per logic block, with outputs disabled. PRELIMINARY ...
Page 12
Switching Waveforms Combinatorial Output INPUT COMBINATORIAL OUTPUT Registered Output with Synchronous Clocking INPUT SYNCHRONOUS CLOCK REGISTERED OUTPUT REGISTERED OUTPUT SYNCHRONOUS CLOCK Registered Output with Product Term Clocking Input Going Through the Array INPUT PRODUCT TERM CLOCK REGISTERED OUTPUT PRODUCT TERM ...
Page 13
Switching Waveforms (continued) Registered Output with Product Term Clocking Input Coming From Adjacent Buried Register INPUT PRODUCT TERM CLOCK REGISTERED OUTPUT PRODUCT TERM CLOCK Latched Output INPUT LATCH ENABLE LATCHED OUTPUT Registered Input REGISTERED INPUT INPUT REGISTER CLOCK COMBINATORIAL OUTPUT ...
Page 14
Switching Waveforms (continued) Clock to Clock INPUT REGISTER CLOCK OUTPUT REGISTER CLOCK Latched Input LATCHED INPUT LATCH ENABLE COMBINATORIAL OUTPUT LATCH ENABLE Latched Input and Output LATCHED INPUT LATCHED OUTPUT INPUT LATCH ENABLE OUTPUT LATCH ENABLE LATCH ENABLE PRELIMINARY t ...
Page 15
Switching Waveforms (continued) Asynchronous Reset INPUT REGISTERED OUTPUT CLOCK Asynchronous Preset INPUT REGISTERED OUTPUT CLOCK Output Enable/Disable INPUT OUTPUTS PRELIMINARY CY37256 t RR 37256- 37256- ...
Page 16
... CY37256P256-125BGC CY37256P160-125AI CY37256P208-125NI CY37256P256-125BGI CY37256P160-125UMB 83 CY37256P160-83AC CY37256P208-83NC CY37256P256-83BGC CY37256P160-83AI CY37256P208-83NI CY37256P256-83BGI CY37256P160-83UMB In-System Reprogrammable, ISR, UltraLogic, F Semiconductor Corporation. Warp2 and Warp3 are registered trademarks of Cypress Semiconductor Corporation. Document #: 38 00474 D PRELIMINARY Package Name Package Type A160 160-Pin Thin Quad Flatpack N208 208-Pin Plastic Quad Flatpack ...
Page 17
Package Diagrams 160-Pin Thin Plastic Quad Flat Pack (TQFP) A160 PRELIMINARY 17 CY37256 51-85049-A ...
Page 18
Package Diagrams (continued) 256-Lead Ball Grid Array ( 2.33 mm) BG256 © Cypress Semiconductor Corporation, 1999. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any ...
Page 19
Package Diagrams (continued) PRELIMINARY 208-Lead Plastic Quad Flatpack N208 19 CY37256 51-85069-B ...
Page 20
Package Diagrams (continued) © Cypress Semiconductor Corporation, 1999. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor ...